Lines Matching refs:cs_num
23 #define CS_CBE_VALUE(cs_num) (cs_cbe_reg[cs_num]) argument
207 int ddr3_tip_configure_cs(u32 dev_num, u32 if_id, u32 cs_num, u32 enable) in ddr3_tip_configure_cs() argument
218 SDRAM_ACCESS_CONTROL_REG, (data << (cs_num * 4)), in ddr3_tip_configure_cs()
219 0x3 << (cs_num * 4))); in ddr3_tip_configure_cs()
226 (addr_hi << (2 + cs_num * 4)), in ddr3_tip_configure_cs()
227 0x3 << (2 + cs_num * 4))); in ddr3_tip_configure_cs()
233 data_high << (20 + cs_num), 1 << (20 + cs_num))); in ddr3_tip_configure_cs()
238 SDRAM_ACCESS_CONTROL_REG, 1 << (16 + cs_num), in ddr3_tip_configure_cs()
239 1 << (16 + cs_num))); in ddr3_tip_configure_cs()
241 switch (cs_num) { in ddr3_tip_configure_cs()
247 DDR_CONTROL_LOW_REG, (enable << (cs_num + 11)), in ddr3_tip_configure_cs()
248 1 << (cs_num + 11))); in ddr3_tip_configure_cs()
263 static int calc_cs_num(u32 dev_num, u32 if_id, u32 *cs_num) in calc_cs_num() argument
292 *cs_num = curr_cs_num; in calc_cs_num()
303 u32 cs_num; in hws_ddr3_tip_init_controller() local
583 (dev_num, if_id, &cs_num)); in hws_ddr3_tip_init_controller()
584 t2t = (cs_num == 1) ? 0 : 1; in hws_ddr3_tip_init_controller()
1768 u32 if_id, bus_num, cs_bitmask, data_val, cs_num; in ddr3_tip_write_cs_result() local
1780 cs_num = GET_CS_FROM_MASK(cs_bitmask); in ddr3_tip_write_cs_result()
1793 CS_REG_VALUE(cs_num), in ddr3_tip_write_cs_result()