266 	u32 bus_cnt;  in calc_cs_num()  local
272 	for (bus_cnt = 0; bus_cnt < GET_TOPOLOGY_NUM_OF_BUSES(); bus_cnt++) {  in calc_cs_num()
273 		VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt);  in calc_cs_num()
276 			as_bus_params[bus_cnt].cs_bitmask;  in calc_cs_num()
287 					   if_id, bus_cnt, cs_count,  in calc_cs_num()
314 	u32 refresh_interval_cnt = 0, bus_cnt = 0, adll_tap = 0;  in hws_ddr3_tip_init_controller()  local
468 			for (bus_cnt = 0;  in hws_ddr3_tip_init_controller()
469 			     bus_cnt < GET_TOPOLOGY_NUM_OF_BUSES();  in hws_ddr3_tip_init_controller()
470 			     bus_cnt++) {  in hws_ddr3_tip_init_controller()
471 				VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt);  in hws_ddr3_tip_init_controller()
474 					as_bus_params[bus_cnt].cs_bitmask;  in hws_ddr3_tip_init_controller()
725 	u32 data_value = 0, bus_cnt;  in ddr3_tip_rank_control()  local
728 	for (bus_cnt = 1; bus_cnt < GET_TOPOLOGY_NUM_OF_BUSES(); bus_cnt++) {  in ddr3_tip_rank_control()
729 		VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt);  in ddr3_tip_rank_control()
733 		     as_bus_params[bus_cnt].cs_bitmask) ||  in ddr3_tip_rank_control()
737 		     as_bus_params[bus_cnt].mirror_enable_bitmask))  in ddr3_tip_rank_control()
740 					   bus_cnt));  in ddr3_tip_rank_control()
760 	u32 bus_cnt, data_value, ck_swap_pup_ctrl;  in ddr3_tip_pad_inv()  local
763 	for (bus_cnt = 0; bus_cnt < GET_TOPOLOGY_NUM_OF_BUSES(); bus_cnt++) {  in ddr3_tip_pad_inv()
764 		VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt);  in ddr3_tip_pad_inv()
766 		    as_bus_params[bus_cnt].is_dqs_swap == 1) {  in ddr3_tip_pad_inv()
769 						       if_id, bus_cnt,  in ddr3_tip_pad_inv()
776 		    as_bus_params[bus_cnt].is_ck_swap == 1) {  in ddr3_tip_pad_inv()
777 			if (bus_cnt <= 1)  in ddr3_tip_pad_inv()
1158 	u32 bus_cnt = 0;  in adll_calibration()  local
1180 	for (bus_cnt = 0; bus_cnt < GET_TOPOLOGY_NUM_OF_BUSES(); bus_cnt++) {  in adll_calibration()
1181 		VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt);  in adll_calibration()
1183 			     (dev_num, access_type, if_id, bus_cnt,  in adll_calibration()
1187 			     (dev_num, access_type, if_id, bus_cnt,  in adll_calibration()
1225 		bus_cnt = 0, t_hclk = 0, t_wr = 0,  in ddr3_tip_freq_set()  local
1431 		for (bus_cnt = 0; bus_cnt < GET_TOPOLOGY_NUM_OF_BUSES();  in ddr3_tip_freq_set()
1432 		     bus_cnt++) {  in ddr3_tip_freq_set()
1433 			VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt);  in ddr3_tip_freq_set()
1436 				      if_id, bus_cnt, DDR_PHY_DATA,  in ddr3_tip_freq_set()
1444 				      bus_cnt, DDR_PHY_DATA, 0x94,  in ddr3_tip_freq_set()