Lines Matching refs:bus_act_mask
273 VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt); in calc_cs_num()
337 VALIDATE_ACTIVE(tm->bus_act_mask, bus_index); in hws_ddr3_tip_init_controller()
373 (DDR3_IS_16BIT_DRAM_MODE(tm->bus_act_mask) in hws_ddr3_tip_init_controller()
471 VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt); in hws_ddr3_tip_init_controller()
729 VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_rank_control()
764 VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_pad_inv()
995 VALIDATE_ACTIVE(tm->bus_act_mask, bus_index); in ddr3_tip_bus_read()
1181 VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt); in adll_calibration()
1304 VALIDATE_ACTIVE(tm->bus_act_mask, bus_index); in ddr3_tip_freq_set()
1433 VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_freq_set()
1775 VALIDATE_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_write_cs_result()
1886 VALIDATE_ACTIVE(tm->bus_act_mask, phy_id); in ddr3_tip_ddr3_reset_phy_regs()
2458 VALIDATE_ACTIVE(tm->bus_act_mask, bus_index); in ddr3_tip_enable_init_sequence()
2547 return (DDR3_IS_16BIT_DRAM_MODE(tm->bus_act_mask) == in hws_ddr3_get_bus_width()