Lines Matching refs:dev_num

301 int ddr3_tip_enable_init_sequence(u32 dev_num);
303 int ddr3_tip_init_a38x(u32 dev_num, u32 board_id);
317 int ddr3_tip_reg_write(u32 dev_num, u32 reg_addr, u32 data);
318 int ddr3_tip_reg_read(u32 dev_num, u32 reg_addr, u32 *data, u32 reg_mask);
320 int ddr3_tip_a38x_get_freq_config(u8 dev_num, enum hws_ddr_freq freq,
323 int ddr3_a38x_update_topology_map(u32 dev_num,
325 int ddr3_tip_a38x_get_init_freq(int dev_num, enum hws_ddr_freq *freq);
326 int ddr3_tip_a38x_get_medium_freq(int dev_num, enum hws_ddr_freq *freq);
327 int ddr3_tip_a38x_if_read(u8 dev_num, enum hws_access_type interface_access,
329 int ddr3_tip_a38x_if_write(u8 dev_num, enum hws_access_type interface_access,
331 int ddr3_tip_a38x_get_device_info(u8 dev_num,
334 int ddr3_tip_init_a38x(u32 dev_num, u32 board_id);
336 int print_adll(u32 dev_num, u32 adll[MAX_INTERFACE_NUM * MAX_BUS_NUM]);
337 int ddr3_tip_restore_dunit_regs(u32 dev_num);
343 int ddr3_tip_init_specific_reg_config(u32 dev_num,
347 int ddr3_tip_tune_training_params(u32 dev_num,
361 int ddr3_tip_print_pbs_result(u32 dev_num, u32 cs_num, enum pbs_dir pbs_mode);
362 int ddr3_tip_clean_pbs_result(u32 dev_num, enum pbs_dir pbs_mode);
364 int ddr3_tip_static_round_trip_arr_build(u32 dev_num,