189 		reg_write((win_ctrl_reg + 0x4 * ui), win[ui]);  in ddr3_restore_and_set_final_windows()
207 	reg_write(REG_FASTPATH_WIN_0_CTRL_ADDR, reg);  in ddr3_restore_and_set_final_windows()
229 	reg_write(ADDRESS_FILTERING_END_REGISTER, 0);  in ddr3_save_and_set_training_windows()
236 	reg_write(REG_XBAR_WIN_19_CTRL_ADDR, 0);  in ddr3_save_and_set_training_windows()
264 			reg_write(win_ctrl_reg + win_jump_index * tmp_count,  in ddr3_save_and_set_training_windows()
268 			reg_write(win_base_reg + win_jump_index * tmp_count,  in ddr3_save_and_set_training_windows()
272 				reg_write(win_remap_reg +  in ddr3_save_and_set_training_windows()
354 	reg_write(REG_TRAINING_DEBUG_3_ADDR, reg);  in ddr3_init()
362 	reg_write(REG_DRAM_AXI_CTRL_ADDR, 0);  in ddr3_init()
406 	reg_write(REG_BOOTROM_ROUTINE_ADDR,  in ddr3_init()
567 		reg_write(config_table_ptr[i].reg_addr,  in ddr3_new_tip_dlb_config()
576 	reg_write(REG_STATIC_DRAM_DLB_CONTROL, reg);  in ddr3_new_tip_dlb_config()
631 			reg_write(REG_FASTPATH_WIN_CTRL_ADDR(cs), reg);  in ddr3_fast_path_dynamic_cs_size_config()
636 			reg_write(REG_FASTPATH_WIN_BASE_ADDR(cs), reg);  in ddr3_fast_path_dynamic_cs_size_config()
655 	reg_write(ADDRESS_FILTERING_END_REGISTER, mem_total_size);  in ddr3_fast_path_dynamic_cs_size_config()