Lines Matching refs:cs

75 		cs_sa = (regs->cs[i].bnds >> 16) & 0xfff;  in fsl_ddr_set_memctl_regs()
76 cs_ea = regs->cs[i].bnds & 0xfff; in fsl_ddr_set_memctl_regs()
79 csn_bnds_backup = regs->cs[i].bnds; in fsl_ddr_set_memctl_regs()
80 csn_bnds_t = (unsigned int *) &regs->cs[i].bnds; in fsl_ddr_set_memctl_regs()
82 *csn_bnds_t = regs->cs[i].bnds + 0x01000000; in fsl_ddr_set_memctl_regs()
84 *csn_bnds_t = regs->cs[i].bnds + 0x01000100; in fsl_ddr_set_memctl_regs()
87 csn, csn_bnds_backup, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
94 out_be32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
95 out_be32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
96 out_be32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
99 out_be32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
100 out_be32(&ddr->cs1_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
101 out_be32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
104 out_be32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
105 out_be32(&ddr->cs2_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
106 out_be32(&ddr->cs2_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
109 out_be32(&ddr->cs3_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
110 out_be32(&ddr->cs3_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
111 out_be32(&ddr->cs3_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
230 if (!(regs->cs[2].config & SDRAM_CS_CONFIG_EN)) in fsl_ddr_set_memctl_regs()
250 if (!(regs->cs[2].config & SDRAM_CS_CONFIG_EN)) in fsl_ddr_set_memctl_regs()
270 if (!(regs->cs[2].config & SDRAM_CS_CONFIG_EN)) in fsl_ddr_set_memctl_regs()
290 if (!(regs->cs[2].config & SDRAM_CS_CONFIG_EN)) in fsl_ddr_set_memctl_regs()
310 if (!(regs->cs[2].config & SDRAM_CS_CONFIG_EN)) in fsl_ddr_set_memctl_regs()
401 if (!(regs->cs[i].config & 0x80000000)) in fsl_ddr_set_memctl_regs()
404 ((regs->cs[i].config >> 14) & 0x3) + 2 + in fsl_ddr_set_memctl_regs()
405 ((regs->cs[i].config >> 8) & 0x7) + 12 + in fsl_ddr_set_memctl_regs()
406 ((regs->cs[i].config >> 0) & 0x7) + 8 + in fsl_ddr_set_memctl_regs()
412 else if (regs->cs[0].config & 0x20000000) /* 2-way interleaving */ in fsl_ddr_set_memctl_regs()
524 csn_bnds_t = (unsigned int *) &regs->cs[csn].bnds; in fsl_ddr_set_memctl_regs()
527 csn, regs->cs[csn].bnds); in fsl_ddr_set_memctl_regs()
531 out_be32(&ddr->cs0_bnds, regs->cs[csn].bnds); in fsl_ddr_set_memctl_regs()
534 out_be32(&ddr->cs1_bnds, regs->cs[csn].bnds); in fsl_ddr_set_memctl_regs()
538 out_be32(&ddr->cs2_bnds, regs->cs[csn].bnds); in fsl_ddr_set_memctl_regs()
541 out_be32(&ddr->cs3_bnds, regs->cs[csn].bnds); in fsl_ddr_set_memctl_regs()