Lines Matching refs:timeout
23 int timeout = 1000; in set_wait_for_bits_clear() local
29 timeout--; in set_wait_for_bits_clear()
31 if (timeout <= 0) in set_wait_for_bits_clear()
56 int timeout; in fsl_ddr_set_memctl_regs() local
321 timeout = 40; in fsl_ddr_set_memctl_regs()
324 (timeout > 0)) { in fsl_ddr_set_memctl_regs()
326 timeout--; in fsl_ddr_set_memctl_regs()
328 if (timeout <= 0) { in fsl_ddr_set_memctl_regs()
372 timeout = 40; in fsl_ddr_set_memctl_regs()
374 (timeout > 0)) { in fsl_ddr_set_memctl_regs()
376 timeout--; in fsl_ddr_set_memctl_regs()
378 if (timeout <= 0) { in fsl_ddr_set_memctl_regs()
434 timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 / in fsl_ddr_set_memctl_regs()
438 debug("Need to wait up to %d * 10ms\n", timeout); in fsl_ddr_set_memctl_regs()
442 (timeout >= 0)) { in fsl_ddr_set_memctl_regs()
444 timeout--; in fsl_ddr_set_memctl_regs()
447 if (timeout <= 0) in fsl_ddr_set_memctl_regs()
498 timeout = 100; in fsl_ddr_set_memctl_regs()
499 while (timeout > 0 && (mtcr & BIST_CR_EN)) { in fsl_ddr_set_memctl_regs()
501 timeout--; in fsl_ddr_set_memctl_regs()
504 if (timeout <= 0) in fsl_ddr_set_memctl_regs()