13 static struct socfpga_sdr_rw_load_manager *sdr_rw_load_mgr_regs =  variable
755 	writel(0xff, &sdr_rw_load_mgr_regs->load_cntr0);  in set_jump_as_return()
809 		       &sdr_rw_load_mgr_regs->load_cntr1);  in delay_for_n_mem_clocks()
818 		       &sdr_rw_load_mgr_regs->load_cntr0);  in delay_for_n_mem_clocks()
821 		       &sdr_rw_load_mgr_regs->load_cntr1);  in delay_for_n_mem_clocks()
854 	       &sdr_rw_load_mgr_regs->load_cntr0);  in rw_mgr_mem_init_load_regs()
856 	       &sdr_rw_load_mgr_regs->load_cntr1);  in rw_mgr_mem_init_load_regs()
858 	       &sdr_rw_load_mgr_regs->load_cntr2);  in rw_mgr_mem_init_load_regs()
1072 		writel(0xFF, &sdr_rw_load_mgr_regs->load_cntr2);  in rw_mgr_mem_calibrate_write_test_issue()
1094 		writel(0xFF, &sdr_rw_load_mgr_regs->load_cntr2);  in rw_mgr_mem_calibrate_write_test_issue()
1112 		writel(0x0, &sdr_rw_load_mgr_regs->load_cntr2);  in rw_mgr_mem_calibrate_write_test_issue()
1119 		writel(rw_wl_nop_cycles - 1, &sdr_rw_load_mgr_regs->load_cntr3);  in rw_mgr_mem_calibrate_write_test_issue()
1135 		writel(0x08, &sdr_rw_load_mgr_regs->load_cntr0);  in rw_mgr_mem_calibrate_write_test_issue()
1137 		writel(0x40, &sdr_rw_load_mgr_regs->load_cntr0);  in rw_mgr_mem_calibrate_write_test_issue()
1145 	writel(0x30, &sdr_rw_load_mgr_regs->load_cntr1);  in rw_mgr_mem_calibrate_write_test_issue()
1262 		writel(0x20, &sdr_rw_load_mgr_regs->load_cntr0);  in rw_mgr_mem_calibrate_read_test_patterns()
1266 		writel(0x20, &sdr_rw_load_mgr_regs->load_cntr1);  in rw_mgr_mem_calibrate_read_test_patterns()
1325 		writel(0x20, &sdr_rw_load_mgr_regs->load_cntr0);  in rw_mgr_mem_calibrate_read_load_patterns()
1330 		writel(0x20, &sdr_rw_load_mgr_regs->load_cntr1);  in rw_mgr_mem_calibrate_read_load_patterns()
1335 		writel(0x04, &sdr_rw_load_mgr_regs->load_cntr2);  in rw_mgr_mem_calibrate_read_load_patterns()
1340 		writel(0x04, &sdr_rw_load_mgr_regs->load_cntr3);  in rw_mgr_mem_calibrate_read_load_patterns()
1390 		writel(0x10, &sdr_rw_load_mgr_regs->load_cntr1);  in rw_mgr_mem_calibrate_read_test()
1395 		writel(0x10, &sdr_rw_load_mgr_regs->load_cntr2);  in rw_mgr_mem_calibrate_read_test()
1400 			writel(0x1, &sdr_rw_load_mgr_regs->load_cntr0);  in rw_mgr_mem_calibrate_read_test()
1403 			writel(0x06, &sdr_rw_load_mgr_regs->load_cntr0);  in rw_mgr_mem_calibrate_read_test()
1405 			writel(0x32, &sdr_rw_load_mgr_regs->load_cntr0);  in rw_mgr_mem_calibrate_read_test()
1412 			       &sdr_rw_load_mgr_regs->load_cntr3);  in rw_mgr_mem_calibrate_read_test()
1414 			writel(0x0, &sdr_rw_load_mgr_regs->load_cntr3);  in rw_mgr_mem_calibrate_read_test()
3152 		writel(0x0F, &sdr_rw_load_mgr_regs->load_cntr0);  in mem_precharge_and_activate()
3156 		writel(0x0F, &sdr_rw_load_mgr_regs->load_cntr1);  in mem_precharge_and_activate()