Lines Matching refs:SDR_PHYGRP_RWMGRGRP_ADDRESS
15 (SDR_PHYGRP_RWMGRGRP_ADDRESS | 0x800);
18 (SDR_PHYGRP_RWMGRGRP_ADDRESS | 0xC00);
247 writel(cs_and_odt_mask, SDR_PHYGRP_RWMGRGRP_ADDRESS | in set_rank_and_odt_mask()
814 writel(rwcfg->idle_loop1, SDR_PHYGRP_RWMGRGRP_ADDRESS | in delay_for_n_mem_clocks()
831 SDR_PHYGRP_RWMGRGRP_ADDRESS | in delay_for_n_mem_clocks()
849 u32 grpaddr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_init_load_regs()
880 u32 grpaddr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_load_user()
942 writel(RW_MGR_RANK_ALL, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_initialize()
1131 writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_write_test_issue()
1155 writel(mcc_instruction, (SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_write_test_issue()
1203 base_rw_mgr = readl(SDR_PHYGRP_RWMGRGRP_ADDRESS); in rw_mgr_mem_calibrate_write_test()
1240 const u32 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test_patterns()
1275 writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test_patterns()
1280 base_rw_mgr = readl(SDR_PHYGRP_RWMGRGRP_ADDRESS); in rw_mgr_mem_calibrate_read_test_patterns()
1345 writel(rwcfg->guaranteed_write, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_load_patterns()
1424 writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test()
1428 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test()
1431 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_calibrate_read_test()
1440 base_rw_mgr = readl(SDR_PHYGRP_RWMGRGRP_ADDRESS); in rw_mgr_mem_calibrate_read_test()
1449 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_RUN_SINGLE_GROUP_OFFSET; in rw_mgr_mem_calibrate_read_test()
3149 writel(rwcfg->precharge_all, SDR_PHYGRP_RWMGRGRP_ADDRESS | in mem_precharge_and_activate()
3161 writel(rwcfg->activate_0_and_1, SDR_PHYGRP_RWMGRGRP_ADDRESS | in mem_precharge_and_activate()
3588 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_INST_ROM_WRITE_OFFSET; in hc_initialize_rom_data()
3593 addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_AC_ROM_WRITE_OFFSET; in hc_initialize_rom_data()