Lines Matching refs:rate
78 u32 con, sel, rate; in rv1126b_peri_get_clk() local
85 rate = 200 * MHz; in rv1126b_peri_get_clk()
87 rate = OSC_HZ; in rv1126b_peri_get_clk()
93 rate = 100 * MHz; in rv1126b_peri_get_clk()
95 rate = OSC_HZ; in rv1126b_peri_get_clk()
101 rate = 600 * MHz; in rv1126b_peri_get_clk()
103 rate = 400 * MHz; in rv1126b_peri_get_clk()
105 rate = 200 * MHz; in rv1126b_peri_get_clk()
110 rate = 100 * MHz; in rv1126b_peri_get_clk()
116 rate = 400 * MHz; in rv1126b_peri_get_clk()
118 rate = 300 * MHz; in rv1126b_peri_get_clk()
120 rate = 200 * MHz; in rv1126b_peri_get_clk()
126 rate = 200 * MHz; in rv1126b_peri_get_clk()
128 rate = 100 * MHz; in rv1126b_peri_get_clk()
134 return rate; in rv1126b_peri_get_clk()
138 ulong clk_id, ulong rate) in rv1126b_peri_set_clk() argument
145 if (rate >= 198 * MHz) in rv1126b_peri_set_clk()
154 if (rate >= 99 * MHz) in rv1126b_peri_set_clk()
163 if (rate >= 594 * MHz) in rv1126b_peri_set_clk()
165 else if (rate >= 396 * MHz) in rv1126b_peri_set_clk()
178 if (rate >= 396 * MHz) in rv1126b_peri_set_clk()
180 else if (rate >= 297 * MHz) in rv1126b_peri_set_clk()
189 if (rate >= 198 * MHz) in rv1126b_peri_set_clk()
209 ulong rate; in rv1126b_i2c_get_clk() local
221 rate = 200 * MHz; in rv1126b_i2c_get_clk()
223 rate = OSC_HZ; in rv1126b_i2c_get_clk()
229 rate = 100 * MHz; in rv1126b_i2c_get_clk()
231 rate = RC_OSC_HZ; in rv1126b_i2c_get_clk()
233 rate = OSC_HZ; in rv1126b_i2c_get_clk()
239 return rate; in rv1126b_i2c_get_clk()
243 ulong rate) in rv1126b_i2c_set_clk() argument
255 if (rate == OSC_HZ) in rv1126b_i2c_set_clk()
263 if (rate == OSC_HZ) in rv1126b_i2c_set_clk()
265 else if (rate == RC_OSC_HZ) in rv1126b_i2c_set_clk()
281 u32 sel, con, rate; in rv1126b_crypto_get_clk() local
294 rate = 200 * MHz; in rv1126b_crypto_get_clk()
296 rate = OSC_HZ; in rv1126b_crypto_get_clk()
304 rate = 300 * MHz; in rv1126b_crypto_get_clk()
306 rate = 200 * MHz; in rv1126b_crypto_get_clk()
311 return rate; in rv1126b_crypto_get_clk()
315 ulong clk_id, ulong rate) in rv1126b_crypto_set_clk() argument
324 rv1126b_peri_set_clk(priv, HCLK_BUS_ROOT, rate); in rv1126b_crypto_set_clk()
327 if (rate >= 198 * MHz) in rv1126b_crypto_set_clk()
337 if (rate >= 297 * MHz) in rv1126b_crypto_set_clk()
435 ulong clk_id, ulong rate) in rv1126b_mmc_set_clk() argument
441 if ((OSC_HZ % rate) == 0) { in rv1126b_mmc_set_clk()
444 } else if ((priv->cpll_hz % rate) == 0) { in rv1126b_mmc_set_clk()
451 src_clk_div = DIV_ROUND_UP(prate, rate); in rv1126b_mmc_set_clk()
456 src_clk_div = DIV_ROUND_UP(prate, rate); in rv1126b_mmc_set_clk()
466 src_clk_div = DIV_ROUND_UP(prate, rate); in rv1126b_mmc_set_clk()
476 src_clk_div = DIV_ROUND_UP(prate, rate); in rv1126b_mmc_set_clk()
487 src_clk_div = DIV_ROUND_UP(prate, rate); in rv1126b_mmc_set_clk()
498 if ((OSC_HZ % rate) == 0) { in rv1126b_mmc_set_clk()
501 } else if ((100 * MHz % rate) == 0) { in rv1126b_mmc_set_clk()
508 src_clk_div = DIV_ROUND_UP(prate, rate); in rv1126b_mmc_set_clk()
525 u32 sel, con, rate; in rv1126b_spi_get_clk() local
540 rate = 200 * MHz; in rv1126b_spi_get_clk()
542 rate = 100 * MHz; in rv1126b_spi_get_clk()
544 rate = 50 * MHz; in rv1126b_spi_get_clk()
546 rate = OSC_HZ; in rv1126b_spi_get_clk()
548 return rate; in rv1126b_spi_get_clk()
552 ulong clk_id, ulong rate) in rv1126b_spi_set_clk() argument
557 if (rate >= 198 * MHz) in rv1126b_spi_set_clk()
559 else if (rate >= 99 * MHz) in rv1126b_spi_set_clk()
561 else if (rate >= 48 * MHz) in rv1126b_spi_set_clk()
626 ulong clk_id, ulong rate) in rv1126b_pwm_set_clk() argument
631 if (rate >= 99 * MHz) in rv1126b_pwm_set_clk()
653 if ((OSC_HZ % rate) == 0) { in rv1126b_pwm_set_clk()
656 } else if ((100 * MHz % rate) == 0) { in rv1126b_pwm_set_clk()
663 src_clk_div = DIV_ROUND_UP(prate, rate); in rv1126b_pwm_set_clk()
720 ulong clk_id, ulong rate) in rv1126b_adc_set_clk() argument
725 if ((OSC_HZ % rate) == 0) { in rv1126b_adc_set_clk()
732 src_clk_div = DIV_ROUND_UP(prate, rate); in rv1126b_adc_set_clk()
917 ulong clk_id, ulong rate) in rv1126b_frac_set_rate() argument
923 if ((OSC_HZ % rate) == 0) { in rv1126b_frac_set_rate()
926 } else if ((priv->aupll_hz % rate) == 0) { in rv1126b_frac_set_rate()
929 } else if ((priv->cpll_hz % rate) == 0) { in rv1126b_frac_set_rate()
937 rational_best_approximation(rate, p_rate, in rv1126b_frac_set_rate()
1120 ulong clk_id, ulong rate) in rv1126b_uart_set_rate() argument
1125 if (rv1126b_frac_get_rate(priv, CLK_CM_FRAC0) % rate == 0) { in rv1126b_uart_set_rate()
1128 } else if (rv1126b_frac_get_rate(priv, CLK_CM_FRAC1) % rate == 0) { in rv1126b_uart_set_rate()
1131 } else if (rv1126b_frac_get_rate(priv, CLK_CM_FRAC2) % rate == 0) { in rv1126b_uart_set_rate()
1134 } else if (rv1126b_frac_get_rate(priv, CLK_UART_FRAC0) % rate == 0) { in rv1126b_uart_set_rate()
1137 } else if (rv1126b_frac_get_rate(priv, CLK_UART_FRAC1) % rate == 0) { in rv1126b_uart_set_rate()
1145 div = DIV_ROUND_UP(p_rate, rate); in rv1126b_uart_set_rate()
1149 if (rate == OSC_HZ) in rv1126b_uart_set_rate()
1151 else if (rate == RC_OSC_HZ) in rv1126b_uart_set_rate()
1159 rv1126b_uart_set_rate(priv, SCLK_UART0_SRC, rate); in rv1126b_uart_set_rate()
1277 ulong clk_id, ulong rate) in rv1126b_wdt_set_rate() argument
1282 if (rate == OSC_HZ) in rv1126b_wdt_set_rate()
1304 if (rate == OSC_HZ) in rv1126b_wdt_set_rate()
1306 else if (rate == RC_OSC_HZ) in rv1126b_wdt_set_rate()
1308 else if (rate == 1000000) in rv1126b_wdt_set_rate()
1345 ulong clk_id, ulong rate) in rv1126b_vop_set_rate() argument
1350 if (!(priv->cpll_hz % rate)) { in rv1126b_vop_set_rate()
1358 div = DIV_ROUND_UP(p_rate, rate); in rv1126b_vop_set_rate()
1415 ulong clk_id, ulong rate) in rv1126b_mac_set_rate() argument
1423 if (!(priv->cpll_hz % rate)) { in rv1126b_mac_set_rate()
1430 div = DIV_ROUND_UP(p_rate, rate); in rv1126b_mac_set_rate()
1438 if (!(priv->cpll_hz % rate)) { in rv1126b_mac_set_rate()
1441 } else if (!(priv->gpll_hz % rate)) { in rv1126b_mac_set_rate()
1448 div = DIV_ROUND_UP(p_rate, rate); in rv1126b_mac_set_rate()
1469 ulong rate = 0; in rv1126b_clk_get_rate() local
1478 rate = rockchip_pll_get_rate(&rv1126b_pll_clks[GPLL], priv->cru, in rv1126b_clk_get_rate()
1482 rate = rockchip_pll_get_rate(&rv1126b_pll_clks[AUPLL], in rv1126b_clk_get_rate()
1486 rate = rockchip_pll_get_rate(&rv1126b_pll_clks[CPLL], priv->cru, in rv1126b_clk_get_rate()
1497 rate = rv1126b_peri_get_clk(priv, clk->id); in rv1126b_clk_get_rate()
1505 rate = rv1126b_crypto_get_clk(priv, clk->id); in rv1126b_clk_get_rate()
1519 rate = rv1126b_mmc_get_clk(priv, clk->id); in rv1126b_clk_get_rate()
1528 rate = rv1126b_i2c_get_clk(priv, clk->id); in rv1126b_clk_get_rate()
1532 rate = rv1126b_spi_get_clk(priv, clk->id); in rv1126b_clk_get_rate()
1538 rate = rv1126b_pwm_get_clk(priv, clk->id); in rv1126b_clk_get_rate()
1548 rate = rv1126b_adc_get_clk(priv, clk->id); in rv1126b_clk_get_rate()
1557 rate = rv1126b_frac_get_rate(priv, clk->id); in rv1126b_clk_get_rate()
1568 rate = rv1126b_uart_get_rate(priv, clk->id); in rv1126b_clk_get_rate()
1571 rate = 400 * MHz; in rv1126b_clk_get_rate()
1578 rate = rv1126b_wdt_get_rate(priv, clk->id); in rv1126b_clk_get_rate()
1581 rate = rv1126b_vop_get_rate(priv, clk->id); in rv1126b_clk_get_rate()
1588 rate = rv1126b_mac_get_rate(priv, clk->id); in rv1126b_clk_get_rate()
1595 return rate; in rv1126b_clk_get_rate()
1598 static ulong rv1126b_clk_set_rate(struct clk *clk, ulong rate) in rv1126b_clk_set_rate() argument
1611 GPLL, rate); in rv1126b_clk_set_rate()
1615 AUPLL, rate); in rv1126b_clk_set_rate()
1619 CPLL, rate); in rv1126b_clk_set_rate()
1629 ret = rv1126b_peri_set_clk(priv, clk->id, rate); in rv1126b_clk_set_rate()
1637 ret = rv1126b_crypto_set_clk(priv, clk->id, rate); in rv1126b_clk_set_rate()
1651 ret = rv1126b_mmc_set_clk(priv, clk->id, rate); in rv1126b_clk_set_rate()
1660 ret = rv1126b_i2c_set_clk(priv, clk->id, rate); in rv1126b_clk_set_rate()
1664 ret = rv1126b_spi_set_clk(priv, clk->id, rate); in rv1126b_clk_set_rate()
1670 ret = rv1126b_pwm_set_clk(priv, clk->id, rate); in rv1126b_clk_set_rate()
1680 ret = rv1126b_adc_set_clk(priv, clk->id, rate); in rv1126b_clk_set_rate()
1689 ret = rv1126b_frac_set_rate(priv, clk->id, rate); in rv1126b_clk_set_rate()
1700 ret = rv1126b_uart_set_rate(priv, clk->id, rate); in rv1126b_clk_set_rate()
1709 ret = rv1126b_wdt_set_rate(priv, clk->id, rate); in rv1126b_clk_set_rate()
1712 ret = rv1126b_vop_set_rate(priv, clk->id, rate); in rv1126b_clk_set_rate()
1719 ret = rv1126b_mac_set_rate(priv, clk->id, rate); in rv1126b_clk_set_rate()
1964 unsigned long rate; in soc_clk_dump() local
1991 rate = clk_get_rate(&clk); in soc_clk_dump()
1994 if (rate < 0) in soc_clk_dump()
1999 rate / 1000); in soc_clk_dump()
2001 if (rate < 0) in soc_clk_dump()
2006 rate / 1000); in soc_clk_dump()