Lines Matching refs:sel
130 u32 sel; in soc_clk_dump() local
141 sel = (readl(&priv->cru->clksel_con[15]) & in soc_clk_dump()
144 if (sel == CLK_CORE_PVTPLL_SRC) in soc_clk_dump()
188 u32 sel, con, div; in rk3506_armclk_get_rate() local
192 sel = (con & CLK_CORE_SRC_SEL_MASK) >> CLK_CORE_SRC_SEL_SHIFT; in rk3506_armclk_get_rate()
195 if (sel == CLK_CORE_SEL_GPLL) in rk3506_armclk_get_rate()
197 else if (sel == CLK_CORE_SEL_V0PLL) in rk3506_armclk_get_rate()
199 else if (sel == CLK_CORE_SEL_V1PLL) in rk3506_armclk_get_rate()
212 u32 con, sel, div, old_div; in rk3506_armclk_set_rate() local
232 sel = CLK_CORE_SEL_V0PLL; in rk3506_armclk_set_rate()
236 sel = CLK_CORE_SEL_V1PLL; in rk3506_armclk_set_rate()
240 sel = CLK_CORE_SEL_GPLL; in rk3506_armclk_set_rate()
252 sel << CLK_CORE_SRC_SEL_SHIFT); in rk3506_armclk_set_rate()
255 sel << CLK_CORE_SRC_SEL_SHIFT); in rk3506_armclk_set_rate()
345 u32 sel, con, div; in rk3506_bus_get_rate() local
351 sel = (con & ACLK_BUS_SEL_MASK) >> ACLK_BUS_SEL_SHIFT; in rk3506_bus_get_rate()
356 sel = (con & HCLK_BUS_SEL_MASK) >> HCLK_BUS_SEL_SHIFT; in rk3506_bus_get_rate()
361 sel = (con & PCLK_BUS_SEL_MASK) >> PCLK_BUS_SEL_SHIFT; in rk3506_bus_get_rate()
368 if (sel == ACLK_BUS_SEL_GPLL_DIV) in rk3506_bus_get_rate()
370 else if (sel == ACLK_BUS_SEL_V0PLL_DIV) in rk3506_bus_get_rate()
372 else if (sel == ACLK_BUS_SEL_V1PLL_DIV) in rk3506_bus_get_rate()
384 u32 sel, div; in rk3506_bus_set_rate() local
387 sel = ACLK_BUS_SEL_V0PLL_DIV; in rk3506_bus_set_rate()
390 sel= ACLK_BUS_SEL_V1PLL_DIV; in rk3506_bus_set_rate()
393 sel= ACLK_BUS_SEL_GPLL_DIV; in rk3506_bus_set_rate()
402 (sel << ACLK_BUS_SEL_SHIFT) | in rk3506_bus_set_rate()
408 (sel << HCLK_BUS_SEL_SHIFT) | in rk3506_bus_set_rate()
414 (sel << PCLK_BUS_SEL_SHIFT) | in rk3506_bus_set_rate()
427 u32 sel, con, div; in rk3506_peri_get_rate() local
433 sel = (con & ACLK_HSPERI_SEL_MASK) >> ACLK_HSPERI_SEL_SHIFT; in rk3506_peri_get_rate()
438 sel = (con & HCLK_LSPERI_SEL_MASK) >> HCLK_LSPERI_SEL_SHIFT; in rk3506_peri_get_rate()
445 if (sel == ACLK_HSPERI_SEL_GPLL_DIV) in rk3506_peri_get_rate()
447 else if (sel == ACLK_HSPERI_SEL_V0PLL_DIV) in rk3506_peri_get_rate()
449 else if (sel == ACLK_HSPERI_SEL_V1PLL_DIV) in rk3506_peri_get_rate()
461 u32 sel, div; in rk3506_peri_set_rate() local
464 sel = ACLK_BUS_SEL_V0PLL_DIV; in rk3506_peri_set_rate()
467 sel = ACLK_BUS_SEL_V1PLL_DIV; in rk3506_peri_set_rate()
470 sel = ACLK_BUS_SEL_GPLL_DIV; in rk3506_peri_set_rate()
479 (sel << ACLK_HSPERI_SEL_SHIFT) | in rk3506_peri_set_rate()
485 (sel << HCLK_LSPERI_SEL_SHIFT) | in rk3506_peri_set_rate()
498 u32 sel, con, div; in rk3506_sdmmc_get_rate() local
502 sel = (con & CCLK_SDMMC_SEL_MASK) >> CCLK_SDMMC_SEL_SHIFT; in rk3506_sdmmc_get_rate()
505 if (sel == CCLK_SDMMC_SEL_24M) in rk3506_sdmmc_get_rate()
507 else if (sel == CCLK_SDMMC_SEL_GPLL) in rk3506_sdmmc_get_rate()
509 else if (sel == CCLK_SDMMC_SEL_V0PLL) in rk3506_sdmmc_get_rate()
511 else if (sel == CCLK_SDMMC_SEL_V1PLL) in rk3506_sdmmc_get_rate()
523 u32 sel, div; in rk3506_sdmmc_set_rate() local
526 sel = CCLK_SDMMC_SEL_24M; in rk3506_sdmmc_set_rate()
529 sel = CCLK_SDMMC_SEL_V0PLL; in rk3506_sdmmc_set_rate()
532 sel= CCLK_SDMMC_SEL_V1PLL; in rk3506_sdmmc_set_rate()
535 sel= CCLK_SDMMC_SEL_GPLL; in rk3506_sdmmc_set_rate()
542 (sel << CCLK_SDMMC_SEL_SHIFT) | in rk3506_sdmmc_set_rate()
551 u32 div, con, sel; in rk3506_saradc_get_rate() local
556 sel = (con & CLK_SARADC_SEL_MASK) >> CLK_SARADC_SEL_SHIFT; in rk3506_saradc_get_rate()
558 if (sel == CLK_SARADC_SEL_24M) in rk3506_saradc_get_rate()
560 else if (sel == CLK_SARADC_SEL_400K) in rk3506_saradc_get_rate()
562 else if (sel == CLK_SARADC_SEL_32K) in rk3506_saradc_get_rate()
574 u32 div, sel; in rk3506_saradc_set_rate() local
577 sel = CLK_SARADC_SEL_32K; in rk3506_saradc_set_rate()
580 sel = CLK_SARADC_SEL_400K; in rk3506_saradc_set_rate()
583 sel= CLK_SARADC_SEL_24M; in rk3506_saradc_set_rate()
590 (sel << CLK_SARADC_SEL_SHIFT) | in rk3506_saradc_set_rate()
646 u32 sel, con, div; in rk3506_i2c_get_rate() local
652 sel = (con & CLK_I2C0_SEL_MASK) >> CLK_I2C0_SEL_SHIFT; in rk3506_i2c_get_rate()
656 sel = (con & CLK_I2C1_SEL_MASK) >> CLK_I2C1_SEL_SHIFT; in rk3506_i2c_get_rate()
660 sel = (con & CLK_I2C2_SEL_MASK) >> CLK_I2C2_SEL_SHIFT; in rk3506_i2c_get_rate()
667 if (sel == CLK_I2C_SEL_GPLL) in rk3506_i2c_get_rate()
669 else if (sel == CLK_I2C_SEL_V0PLL) in rk3506_i2c_get_rate()
671 else if (sel == CLK_I2C_SEL_V1PLL) in rk3506_i2c_get_rate()
683 u32 sel, div; in rk3506_i2c_set_rate() local
686 sel = CLK_I2C_SEL_V0PLL; in rk3506_i2c_set_rate()
689 sel = CLK_I2C_SEL_V1PLL; in rk3506_i2c_set_rate()
692 sel = CLK_I2C_SEL_GPLL; in rk3506_i2c_set_rate()
701 (sel << CLK_I2C0_SEL_SHIFT) | in rk3506_i2c_set_rate()
707 (sel << CLK_I2C1_SEL_SHIFT) | in rk3506_i2c_set_rate()
713 (sel << CLK_I2C2_SEL_SHIFT) | in rk3506_i2c_set_rate()
727 u32 sel, con, div; in rk3506_pwm_get_rate() local
738 sel = (con & CLK_PWM1_SEL_MASK) >> CLK_PWM1_SEL_SHIFT; in rk3506_pwm_get_rate()
740 if (sel == CLK_PWM1_SEL_GPLL_DIV) in rk3506_pwm_get_rate()
742 else if (sel == CLK_PWM1_SEL_V0PLL_DIV) in rk3506_pwm_get_rate()
744 else if (sel == CLK_PWM1_SEL_V1PLL_DIV) in rk3506_pwm_get_rate()
760 u32 sel, div; in rk3506_pwm_set_rate() local
771 sel = CLK_PWM1_SEL_V0PLL_DIV; in rk3506_pwm_set_rate()
774 sel = CLK_PWM1_SEL_V1PLL_DIV; in rk3506_pwm_set_rate()
777 sel = CLK_PWM1_SEL_GPLL_DIV; in rk3506_pwm_set_rate()
783 (sel << CLK_PWM1_SEL_SHIFT) | in rk3506_pwm_set_rate()
796 u32 sel, con, div; in rk3506_spi_get_rate() local
802 sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT; in rk3506_spi_get_rate()
807 sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT; in rk3506_spi_get_rate()
814 if (sel == CLK_SPI_SEL_24M) in rk3506_spi_get_rate()
816 else if (sel == CLK_SPI_SEL_GPLL_DIV) in rk3506_spi_get_rate()
818 else if (sel == CLK_SPI_SEL_V0PLL_DIV) in rk3506_spi_get_rate()
820 else if (sel == CLK_SPI_SEL_V1PLL_DIV) in rk3506_spi_get_rate()
832 u32 sel, div; in rk3506_spi_set_rate() local
835 sel = CLK_SPI_SEL_24M; in rk3506_spi_set_rate()
838 sel = CLK_SPI_SEL_V0PLL_DIV; in rk3506_spi_set_rate()
841 sel = CLK_SPI_SEL_V1PLL_DIV; in rk3506_spi_set_rate()
844 sel = CLK_SPI_SEL_GPLL_DIV; in rk3506_spi_set_rate()
853 (sel << CLK_SPI0_SEL_SHIFT) | in rk3506_spi_set_rate()
859 (sel << CLK_SPI1_SEL_SHIFT) | in rk3506_spi_set_rate()
872 u32 div, sel, con, prate; in rk3506_fspi_get_rate() local
876 sel = (con & SCLK_FSPI_SEL_MASK) >> SCLK_FSPI_SEL_SHIFT; in rk3506_fspi_get_rate()
877 if (sel == SCLK_FSPI_SEL_24M) in rk3506_fspi_get_rate()
879 else if (sel == SCLK_FSPI_SEL_GPLL) in rk3506_fspi_get_rate()
881 else if (sel == SCLK_FSPI_SEL_V0PLL) in rk3506_fspi_get_rate()
883 else if (sel == SCLK_FSPI_SEL_V1PLL) in rk3506_fspi_get_rate()
894 int div, sel; in rk3506_fspi_set_rate() local
897 sel = SCLK_FSPI_SEL_24M; in rk3506_fspi_set_rate()
900 sel = SCLK_FSPI_SEL_V0PLL; in rk3506_fspi_set_rate()
903 sel = SCLK_FSPI_SEL_V1PLL; in rk3506_fspi_set_rate()
906 sel = SCLK_FSPI_SEL_GPLL; in rk3506_fspi_set_rate()
913 sel << SCLK_FSPI_SEL_SHIFT | in rk3506_fspi_set_rate()
922 u32 div, sel, con, prate; in rk3506_vop_dclk_get_rate() local
926 sel = (con & DCLK_VOP_SEL_MASK) >> DCLK_VOP_SEL_SHIFT; in rk3506_vop_dclk_get_rate()
928 if (sel == DCLK_VOP_SEL_24M) in rk3506_vop_dclk_get_rate()
930 else if (sel == DCLK_VOP_SEL_GPLL) in rk3506_vop_dclk_get_rate()
932 else if (sel == DCLK_VOP_SEL_V0PLL) in rk3506_vop_dclk_get_rate()
934 else if (sel == DCLK_VOP_SEL_V1PLL) in rk3506_vop_dclk_get_rate()
945 int div, sel; in rk3506_vop_dclk_set_rate() local
948 sel = DCLK_VOP_SEL_24M; in rk3506_vop_dclk_set_rate()
951 sel = DCLK_VOP_SEL_V0PLL; in rk3506_vop_dclk_set_rate()
954 sel = DCLK_VOP_SEL_V1PLL; in rk3506_vop_dclk_set_rate()
957 sel = DCLK_VOP_SEL_GPLL; in rk3506_vop_dclk_set_rate()
964 sel << DCLK_VOP_SEL_SHIFT | in rk3506_vop_dclk_set_rate()