124 	struct rk3506_clk_priv *priv;  in soc_clk_dump()  local
140 	priv = dev_get_priv(cru_dev);  in soc_clk_dump()
141 	sel = (readl(&priv->cru->clksel_con[15]) &  in soc_clk_dump()
148 		       priv->sync_kernel ? "sync kernel" : "uboot",  in soc_clk_dump()
149 		       priv->armclk_enter_hz / 1000,  in soc_clk_dump()
150 		       priv->armclk_init_hz / 1000,  in soc_clk_dump()
151 		       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,  in soc_clk_dump()
152 		       priv->set_armclk_rate ? " KHz" : "N/A");  in soc_clk_dump()
185 static int rk3506_armclk_get_rate(struct rk3506_clk_priv *priv)  in rk3506_armclk_get_rate()  argument
187 	struct rk3506_cru *cru = priv->cru;  in rk3506_armclk_get_rate()
196 		prate = priv->gpll_hz;  in rk3506_armclk_get_rate()
198 		prate = priv->v0pll_hz;  in rk3506_armclk_get_rate()
200 		prate = priv->v1pll_hz;  in rk3506_armclk_get_rate()
207 static int rk3506_armclk_set_rate(struct rk3506_clk_priv *priv, ulong new_rate)  in rk3506_armclk_set_rate()  argument
210 	struct rk3506_cru *cru = priv->cru;  in rk3506_armclk_set_rate()
223 	old_rate = rk3506_armclk_get_rate(priv);  in rk3506_armclk_set_rate()
233 		div = DIV_ROUND_UP(priv->v0pll_hz, new_rate);  in rk3506_armclk_set_rate()
234 		prate = priv->v0pll_hz;  in rk3506_armclk_set_rate()
237 		div = DIV_ROUND_UP(priv->v1pll_hz, new_rate);  in rk3506_armclk_set_rate()
238 		prate = priv->v1pll_hz;  in rk3506_armclk_set_rate()
241 		div = DIV_ROUND_UP(priv->gpll_hz, new_rate);  in rk3506_armclk_set_rate()
242 		prate = priv->gpll_hz;  in rk3506_armclk_set_rate()
270 static ulong rk3506_pll_div_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_pll_div_get_rate()  argument
272 	struct rk3506_cru *cru = priv->cru;  in rk3506_pll_div_get_rate()
280 		prate = priv->gpll_hz;  in rk3506_pll_div_get_rate()
285 		prate = priv->gpll_div_hz;  in rk3506_pll_div_get_rate()
290 		prate = priv->v0pll_hz;  in rk3506_pll_div_get_rate()
295 		prate = priv->v1pll_hz;  in rk3506_pll_div_get_rate()
304 static ulong rk3506_pll_div_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_pll_div_set_rate()  argument
307 	struct rk3506_cru *cru = priv->cru;  in rk3506_pll_div_set_rate()
312 		div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3506_pll_div_set_rate()
318 		div = DIV_ROUND_UP(priv->gpll_div_hz, rate);  in rk3506_pll_div_set_rate()
324 		div = DIV_ROUND_UP(priv->v0pll_hz, rate);  in rk3506_pll_div_set_rate()
330 		div = DIV_ROUND_UP(priv->v1pll_hz, rate);  in rk3506_pll_div_set_rate()
339 	return rk3506_pll_div_get_rate(priv, clk_id);  in rk3506_pll_div_set_rate()
342 static ulong rk3506_bus_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_bus_get_rate()  argument
344 	struct rk3506_cru *cru = priv->cru;  in rk3506_bus_get_rate()
369 		prate = priv->gpll_div_hz;  in rk3506_bus_get_rate()
371 		prate = priv->v0pll_div_hz;  in rk3506_bus_get_rate()
373 		prate = priv->v1pll_div_hz;  in rk3506_bus_get_rate()
380 static ulong rk3506_bus_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_bus_set_rate()  argument
383 	struct rk3506_cru *cru = priv->cru;  in rk3506_bus_set_rate()
386 	if (priv->v0pll_div_hz % rate == 0) {  in rk3506_bus_set_rate()
388 		div = DIV_ROUND_UP(priv->v0pll_div_hz, rate);  in rk3506_bus_set_rate()
389 	} else if (priv->v1pll_div_hz % rate == 0) {  in rk3506_bus_set_rate()
391 		div = DIV_ROUND_UP(priv->v1pll_div_hz, rate);  in rk3506_bus_set_rate()
394 		div = DIV_ROUND_UP(priv->gpll_div_hz, rate);  in rk3506_bus_set_rate()
421 	return rk3506_bus_get_rate(priv, clk_id);  in rk3506_bus_set_rate()
424 static ulong rk3506_peri_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_peri_get_rate()  argument
426 	struct rk3506_cru *cru = priv->cru;  in rk3506_peri_get_rate()
446 		prate = priv->gpll_div_hz;  in rk3506_peri_get_rate()
448 		prate = priv->v0pll_div_hz;  in rk3506_peri_get_rate()
450 		prate = priv->v1pll_div_hz;  in rk3506_peri_get_rate()
457 static ulong rk3506_peri_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_peri_set_rate()  argument
460 	struct rk3506_cru *cru = priv->cru;  in rk3506_peri_set_rate()
463 	if (priv->v0pll_div_hz % rate == 0) {  in rk3506_peri_set_rate()
465 		div = DIV_ROUND_UP(priv->v0pll_div_hz, rate);  in rk3506_peri_set_rate()
466 	} else if (priv->v1pll_div_hz % rate == 0) {  in rk3506_peri_set_rate()
468 		div = DIV_ROUND_UP(priv->v1pll_div_hz, rate);  in rk3506_peri_set_rate()
471 		div = DIV_ROUND_UP(priv->gpll_div_hz, rate);  in rk3506_peri_set_rate()
492 	return rk3506_peri_get_rate(priv, clk_id);  in rk3506_peri_set_rate()
495 static ulong rk3506_sdmmc_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_sdmmc_get_rate()  argument
497 	struct rk3506_cru *cru = priv->cru;  in rk3506_sdmmc_get_rate()
508 		prate = priv->gpll_hz;  in rk3506_sdmmc_get_rate()
510 		prate = priv->v0pll_hz;  in rk3506_sdmmc_get_rate()
512 		prate = priv->v1pll_hz;  in rk3506_sdmmc_get_rate()
519 static ulong rk3506_sdmmc_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_sdmmc_set_rate()  argument
522 	struct rk3506_cru *cru = priv->cru;  in rk3506_sdmmc_set_rate()
528 	} else if (priv->v0pll_hz % rate == 0) {  in rk3506_sdmmc_set_rate()
530 		div = DIV_ROUND_UP(priv->v0pll_hz, rate);  in rk3506_sdmmc_set_rate()
531 	} else if (priv->v1pll_hz % rate == 0) {  in rk3506_sdmmc_set_rate()
533 		div = DIV_ROUND_UP(priv->v1pll_hz, rate);  in rk3506_sdmmc_set_rate()
536 		div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3506_sdmmc_set_rate()
545 	return rk3506_sdmmc_get_rate(priv, clk_id);  in rk3506_sdmmc_set_rate()
548 static ulong rk3506_saradc_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_saradc_get_rate()  argument
550 	struct rk3506_cru *cru = priv->cru;  in rk3506_saradc_get_rate()
570 static ulong rk3506_saradc_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_saradc_set_rate()  argument
573 	struct rk3506_cru *cru = priv->cru;  in rk3506_saradc_set_rate()
593 	return rk3506_saradc_get_rate(priv, clk_id);  in rk3506_saradc_set_rate()
596 static ulong rk3506_tsadc_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_tsadc_get_rate()  argument
598 	struct rk3506_cru *cru = priv->cru;  in rk3506_tsadc_get_rate()
616 static ulong rk3506_tsadc_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_tsadc_set_rate()  argument
619 	struct rk3506_cru *cru = priv->cru;  in rk3506_tsadc_set_rate()
640 	return rk3506_tsadc_get_rate(priv, clk_id);  in rk3506_tsadc_set_rate()
643 static ulong rk3506_i2c_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_i2c_get_rate()  argument
645 	struct rk3506_cru *cru = priv->cru;  in rk3506_i2c_get_rate()
668 		prate = priv->gpll_hz;  in rk3506_i2c_get_rate()
670 		prate = priv->v0pll_hz;  in rk3506_i2c_get_rate()
672 		prate = priv->v1pll_hz;  in rk3506_i2c_get_rate()
679 static ulong rk3506_i2c_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_i2c_set_rate()  argument
682 	struct rk3506_cru *cru = priv->cru;  in rk3506_i2c_set_rate()
685 	if (priv->v0pll_hz % rate == 0) {  in rk3506_i2c_set_rate()
687 		div = DIV_ROUND_UP(priv->v0pll_hz, rate);  in rk3506_i2c_set_rate()
688 	} else if (priv->v1pll_hz % rate == 0) {  in rk3506_i2c_set_rate()
690 		div = DIV_ROUND_UP(priv->v1pll_hz, rate);  in rk3506_i2c_set_rate()
693 		div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3506_i2c_set_rate()
721 	return rk3506_i2c_get_rate(priv, clk_id);  in rk3506_i2c_set_rate()
724 static ulong rk3506_pwm_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_pwm_get_rate()  argument
726 	struct rk3506_cru *cru = priv->cru;  in rk3506_pwm_get_rate()
734 		prate = priv->gpll_div_100mhz;  in rk3506_pwm_get_rate()
741 			prate = priv->gpll_div_hz;  in rk3506_pwm_get_rate()
743 			prate = priv->v0pll_div_hz;  in rk3506_pwm_get_rate()
745 			prate = priv->v1pll_div_hz;  in rk3506_pwm_get_rate()
756 static ulong rk3506_pwm_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_pwm_set_rate()  argument
759 	struct rk3506_cru *cru = priv->cru;  in rk3506_pwm_set_rate()
764 		div = DIV_ROUND_UP(priv->gpll_div_100mhz, rate);  in rk3506_pwm_set_rate()
770 		if (priv->v0pll_hz % rate == 0) {  in rk3506_pwm_set_rate()
772 			div = DIV_ROUND_UP(priv->v0pll_div_hz, rate);  in rk3506_pwm_set_rate()
773 		} else if (priv->v1pll_hz % rate == 0) {  in rk3506_pwm_set_rate()
775 			div = DIV_ROUND_UP(priv->v1pll_div_hz, rate);  in rk3506_pwm_set_rate()
778 			div = DIV_ROUND_UP(priv->gpll_div_hz, rate);  in rk3506_pwm_set_rate()
790 	return rk3506_pwm_get_rate(priv, clk_id);  in rk3506_pwm_set_rate()
793 static ulong rk3506_spi_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_spi_get_rate()  argument
795 	struct rk3506_cru *cru = priv->cru;  in rk3506_spi_get_rate()
817 		prate = priv->gpll_div_hz;  in rk3506_spi_get_rate()
819 		prate = priv->v0pll_div_hz;  in rk3506_spi_get_rate()
821 		prate = priv->v1pll_div_hz;  in rk3506_spi_get_rate()
828 static ulong rk3506_spi_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_spi_set_rate()  argument
831 	struct rk3506_cru *cru = priv->cru;  in rk3506_spi_set_rate()
837 	} else if (priv->v0pll_div_hz % rate == 0) {  in rk3506_spi_set_rate()
839 		div = DIV_ROUND_UP(priv->v0pll_div_hz, rate);  in rk3506_spi_set_rate()
840 	} else if (priv->v1pll_div_hz % rate == 0) {  in rk3506_spi_set_rate()
842 		div = DIV_ROUND_UP(priv->v1pll_div_hz, rate);  in rk3506_spi_set_rate()
845 		div = DIV_ROUND_UP(priv->gpll_div_hz, rate);  in rk3506_spi_set_rate()
866 	return rk3506_spi_get_rate(priv, clk_id);  in rk3506_spi_set_rate()
869 static ulong rk3506_fspi_get_rate(struct rk3506_clk_priv *priv)  in rk3506_fspi_get_rate()  argument
871 	struct rk3506_cru *cru = priv->cru;  in rk3506_fspi_get_rate()
880 		prate = priv->gpll_hz;  in rk3506_fspi_get_rate()
882 		prate = priv->v0pll_hz;  in rk3506_fspi_get_rate()
884 		prate = priv->v1pll_hz;  in rk3506_fspi_get_rate()
891 static ulong rk3506_fspi_set_rate(struct rk3506_clk_priv *priv, ulong rate)  in rk3506_fspi_set_rate()  argument
893 	struct rk3506_cru *cru = priv->cru;  in rk3506_fspi_set_rate()
899 	} else if ((priv->v0pll_hz % rate) == 0) {  in rk3506_fspi_set_rate()
901 		div = DIV_ROUND_UP(priv->v0pll_hz, rate);  in rk3506_fspi_set_rate()
902 	} else if ((priv->v1pll_hz % rate) == 0) {  in rk3506_fspi_set_rate()
904 		div = DIV_ROUND_UP(priv->v1pll_hz, rate);  in rk3506_fspi_set_rate()
907 		div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3506_fspi_set_rate()
916 	return rk3506_fspi_get_rate(priv);  in rk3506_fspi_set_rate()
919 static ulong rk3506_vop_dclk_get_rate(struct rk3506_clk_priv *priv)  in rk3506_vop_dclk_get_rate()  argument
921 	struct rk3506_cru *cru = priv->cru;  in rk3506_vop_dclk_get_rate()
931 		prate = priv->gpll_hz;  in rk3506_vop_dclk_get_rate()
933 		prate = priv->v0pll_hz;  in rk3506_vop_dclk_get_rate()
935 		prate = priv->v1pll_hz;  in rk3506_vop_dclk_get_rate()
942 static ulong rk3506_vop_dclk_set_rate(struct rk3506_clk_priv *priv, ulong rate)  in rk3506_vop_dclk_set_rate()  argument
944 	struct rk3506_cru *cru = priv->cru;  in rk3506_vop_dclk_set_rate()
950 	} else if ((priv->v0pll_hz % rate) == 0) {  in rk3506_vop_dclk_set_rate()
952 		div = DIV_ROUND_UP(priv->v0pll_hz, rate);  in rk3506_vop_dclk_set_rate()
953 	} else if ((priv->v1pll_hz % rate) == 0) {  in rk3506_vop_dclk_set_rate()
955 		div = DIV_ROUND_UP(priv->v1pll_hz, rate);  in rk3506_vop_dclk_set_rate()
958 		div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3506_vop_dclk_set_rate()
967 	return rk3506_vop_dclk_get_rate(priv);  in rk3506_vop_dclk_set_rate()
970 static ulong rk3506_mac_get_rate(struct rk3506_clk_priv *priv, ulong clk_id)  in rk3506_mac_get_rate()  argument
972 	struct rk3506_cru *cru = priv->cru;  in rk3506_mac_get_rate()
989 	return DIV_TO_RATE(priv->gpll_hz, div);  in rk3506_mac_get_rate()
992 static ulong rk3506_mac_set_rate(struct rk3506_clk_priv *priv, ulong clk_id,  in rk3506_mac_set_rate()  argument
995 	struct rk3506_cru *cru = priv->cru;  in rk3506_mac_set_rate()
1001 		div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3506_mac_set_rate()
1006 		div = DIV_ROUND_UP(priv->gpll_hz, rate);  in rk3506_mac_set_rate()
1014 	return rk3506_mac_get_rate(priv, clk_id);  in rk3506_mac_set_rate()
1019 	struct rk3506_clk_priv *priv = dev_get_priv(clk->dev);  in rk3506_clk_get_rate()  local
1022 	if (!priv->gpll_hz || !priv->v0pll_hz || !priv->v1pll_hz) {  in rk3506_clk_get_rate()
1024 		       __func__, priv->gpll_hz, priv->v0pll_hz, priv->v1pll_hz);  in rk3506_clk_get_rate()
1030 		rate = priv->gpll_hz;  in rk3506_clk_get_rate()
1033 		rate = priv->v0pll_hz;  in rk3506_clk_get_rate()
1036 		rate = priv->v1pll_hz;  in rk3506_clk_get_rate()
1039 		rate = rk3506_armclk_get_rate(priv);  in rk3506_clk_get_rate()
1045 		rate = rk3506_pll_div_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1050 		rate = rk3506_bus_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1054 		rate = rk3506_peri_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1058 		rate = rk3506_sdmmc_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1061 		rate = rk3506_saradc_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1065 		rate = rk3506_tsadc_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1070 		rate = rk3506_i2c_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1074 		rate = rk3506_pwm_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1078 		rate = rk3506_spi_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1081 		rate = rk3506_fspi_get_rate(priv);  in rk3506_clk_get_rate()
1084 		rate = rk3506_vop_dclk_get_rate(priv);  in rk3506_clk_get_rate()
1089 		rate = rk3506_mac_get_rate(priv, clk->id);  in rk3506_clk_get_rate()
1100 	struct rk3506_clk_priv *priv = dev_get_priv(clk->dev);  in rk3506_clk_set_rate()  local
1103 	if (!priv->gpll_hz || !priv->v0pll_hz || !priv->v1pll_hz) {  in rk3506_clk_set_rate()
1105 		       __func__, priv->gpll_hz, priv->v0pll_hz, priv->v1pll_hz);  in rk3506_clk_set_rate()
1113 		if (priv->armclk_hz)  in rk3506_clk_set_rate()
1114 			rk3506_armclk_set_rate(priv, rate);  in rk3506_clk_set_rate()
1115 		priv->armclk_hz = rate;  in rk3506_clk_set_rate()
1121 		ret = rk3506_pll_div_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1126 		ret = rk3506_bus_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1130 		ret = rk3506_peri_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1134 		ret = rk3506_sdmmc_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1137 		ret = rk3506_saradc_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1141 		ret = rk3506_tsadc_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1146 		ret = rk3506_i2c_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1150 		ret = rk3506_pwm_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1154 		ret = rk3506_spi_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1158 		ret = rk3506_fspi_set_rate(priv, rate);  in rk3506_clk_set_rate()
1161 		ret = rk3506_vop_dclk_set_rate(priv, rate);  in rk3506_clk_set_rate()
1166 		ret = rk3506_mac_set_rate(priv, clk->id, rate);  in rk3506_clk_set_rate()
1180 static void rk3506_clk_init(struct rk3506_clk_priv *priv)  in rk3506_clk_init()  argument
1182 	priv->sync_kernel = false;  in rk3506_clk_init()
1184 	if (!priv->gpll_hz) {  in rk3506_clk_init()
1185 		priv->gpll_hz = rockchip_pll_get_rate(&rk3506_pll_clks[GPLL],  in rk3506_clk_init()
1186 						      priv->cru, GPLL);  in rk3506_clk_init()
1187 		priv->gpll_hz = roundup(priv->gpll_hz, 1000);  in rk3506_clk_init()
1189 	if (!priv->v0pll_hz) {  in rk3506_clk_init()
1190 		priv->v0pll_hz = rockchip_pll_get_rate(&rk3506_pll_clks[V0PLL],  in rk3506_clk_init()
1191 						       priv->cru, V0PLL);  in rk3506_clk_init()
1192 		priv->v0pll_hz = roundup(priv->v0pll_hz, 1000);  in rk3506_clk_init()
1194 	if (!priv->v1pll_hz) {  in rk3506_clk_init()
1195 		priv->v1pll_hz = rockchip_pll_get_rate(&rk3506_pll_clks[V1PLL],  in rk3506_clk_init()
1196 						       priv->cru, V1PLL);  in rk3506_clk_init()
1197 		priv->v1pll_hz = roundup(priv->v1pll_hz, 1000);  in rk3506_clk_init()
1199 	if (!priv->gpll_div_hz) {  in rk3506_clk_init()
1200 		priv->gpll_div_hz = rk3506_pll_div_get_rate(priv, CLK_GPLL_DIV);  in rk3506_clk_init()
1201 		priv->gpll_div_hz = roundup(priv->gpll_div_hz, 1000);  in rk3506_clk_init()
1203 	if (!priv->gpll_div_100mhz) {  in rk3506_clk_init()
1204 		priv->gpll_div_100mhz = rk3506_pll_div_get_rate(priv, CLK_GPLL_DIV_100M);  in rk3506_clk_init()
1205 		priv->gpll_div_100mhz = roundup(priv->gpll_div_100mhz, 1000);  in rk3506_clk_init()
1207 	if (!priv->v0pll_div_hz) {  in rk3506_clk_init()
1208 		priv->v0pll_div_hz = rk3506_pll_div_get_rate(priv, CLK_V0PLL_DIV);  in rk3506_clk_init()
1209 		priv->v0pll_div_hz = roundup(priv->v0pll_div_hz, 1000);  in rk3506_clk_init()
1211 	if (!priv->v1pll_div_hz) {  in rk3506_clk_init()
1212 		priv->v1pll_div_hz = rk3506_pll_div_get_rate(priv, CLK_V1PLL_DIV);  in rk3506_clk_init()
1213 		priv->v1pll_div_hz = roundup(priv->v1pll_div_hz, 1000);  in rk3506_clk_init()
1216 	if (!priv->armclk_enter_hz) {  in rk3506_clk_init()
1217 		priv->armclk_enter_hz = rk3506_armclk_get_rate(priv);  in rk3506_clk_init()
1218 		priv->armclk_init_hz = priv->armclk_enter_hz;  in rk3506_clk_init()
1224 	struct rk3506_clk_priv *priv = dev_get_priv(dev);  in rk3506_clk_probe()  local
1233 	rk3506_clk_init(priv);  in rk3506_clk_probe()
1240 		priv->sync_kernel = true;  in rk3506_clk_probe()
1247 	struct rk3506_clk_priv *priv = dev_get_priv(dev);  in rk3506_clk_ofdata_to_platdata()  local
1249 	priv->cru = dev_read_addr_ptr(dev);  in rk3506_clk_ofdata_to_platdata()
1258 	struct sysreset_reg *priv;  in rk3506_clk_bind()  local
1267 		priv = malloc(sizeof(struct sysreset_reg));  in rk3506_clk_bind()
1268 		priv->glb_srst_fst_value = offsetof(struct rk3506_cru,  in rk3506_clk_bind()
1270 		priv->glb_srst_snd_value = offsetof(struct rk3506_cru,  in rk3506_clk_bind()
1272 		sys_child->priv = priv;  in rk3506_clk_bind()
1284 		sf_child->priv = sf_priv;  in rk3506_clk_bind()