56 static void *zynq_clk_get_register(enum zynq_clk id)  in zynq_clk_get_register()  argument
58 	switch (id) {  in zynq_clk_get_register()
132 static ulong zynq_clk_get_pll_rate(struct zynq_clk_priv *priv, enum zynq_clk id)  in zynq_clk_get_pll_rate()  argument
136 	clk_ctrl = readl(zynq_clk_get_register(id));  in zynq_clk_get_pll_rate()
153 static enum zynq_clk_rclk zynq_clk_get_gem_rclk(enum zynq_clk id)  in zynq_clk_get_gem_rclk()  argument
157 	if (id == gem0_clk)  in zynq_clk_get_gem_rclk()
170 static ulong zynq_clk_get_cpu_rate(struct zynq_clk_priv *priv, enum zynq_clk id)  in zynq_clk_get_cpu_rate()  argument
179 	switch (id) {  in zynq_clk_get_cpu_rate()
241 					  enum zynq_clk id, bool two_divs)  in zynq_clk_get_peripheral_rate()  argument
247 	clk_ctrl = readl(zynq_clk_get_register(id));  in zynq_clk_get_peripheral_rate()
271 static ulong zynq_clk_get_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id)  in zynq_clk_get_gem_rate()  argument
275 	if (zynq_clk_get_gem_rclk(id) == mio_clk)  in zynq_clk_get_gem_rate()
276 		return zynq_clk_get_peripheral_rate(priv, id, true);  in zynq_clk_get_gem_rate()
278 	parent = &priv->gem_emio_clk[id - gem0_clk];  in zynq_clk_get_gem_rate()
283 	      id - gem0_clk);  in zynq_clk_get_gem_rate()
315 					  enum zynq_clk id, ulong rate,  in zynq_clk_set_peripheral_rate()  argument
323 	reg = zynq_clk_get_register(id);  in zynq_clk_set_peripheral_rate()
349 static ulong zynq_clk_set_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id,  in zynq_clk_set_gem_rate()  argument
354 	if (zynq_clk_get_gem_rclk(id) == mio_clk)  in zynq_clk_set_gem_rate()
355 		return zynq_clk_set_peripheral_rate(priv, id, rate, true);  in zynq_clk_set_gem_rate()
357 	parent = &priv->gem_emio_clk[id - gem0_clk];  in zynq_clk_set_gem_rate()
362 	      id - gem0_clk);  in zynq_clk_set_gem_rate()
372 	enum zynq_clk id = clk->id;  in zynq_clk_get_rate()  local
375 	switch (id) {  in zynq_clk_get_rate()
377 		return zynq_clk_get_pll_rate(priv, id);  in zynq_clk_get_rate()
379 		return zynq_clk_get_cpu_rate(priv, id);  in zynq_clk_get_rate()
387 		return zynq_clk_get_gem_rate(priv, id);  in zynq_clk_get_rate()
394 		return zynq_clk_get_peripheral_rate(priv, id, two_divs);  in zynq_clk_get_rate()
407 	enum zynq_clk id = clk->id;  in zynq_clk_set_rate()  local
410 	switch (id) {  in zynq_clk_set_rate()
412 		return zynq_clk_set_gem_rate(priv, id, rate);  in zynq_clk_set_rate()
419 		return zynq_clk_set_peripheral_rate(priv, id, rate, two_divs);  in zynq_clk_set_rate()
428 	enum zynq_clk id = clk->id;  in zynq_clk_get_rate()  local
430 	switch (id) {  in zynq_clk_get_rate()
432 		return zynq_clk_get_cpu_rate(priv, id);  in zynq_clk_get_rate()
437 		return zynq_clk_get_peripheral_rate(priv, id, 0);  in zynq_clk_get_rate()
482 	.id		= UCLASS_CLK,