Lines Matching refs:memory

7 Current spi_flash framework supports, single flash memory connected
17        - single spi flash memory connected with single chip select line.
21   | Controller |         I0[3:0]        | Flash memory  |
35   |            |            +=========>| memory        |
41   |            |<===========+====|====>| memory        |
46        - two memory flash devices should has same hw part attributes (like size,
50                Enable U_PAGE[BIT:28] if U_PAGE flag set - upper memory
51                Disable U_PAGE[BIT:28] if U_PAGE flag unset - lower memory
54                by default, if U_PAGE is unset lower memory should accessible,
55                once user wants to access upper memory need to set U_PAGE.
65   | 		|<=====================>| memory	|
71   | 		|<=====================>| memory	|
76 	- two memory flash devices should has same hw part attributes (like size,
81 		Even bits, i.e. bit 0, 2, 4 ., of a data word is located in the lower memory
82 		and odd bits, i.e. bit 1, 3, 5, ., of a data word is located in the upper memory.