Lines Matching +full:- +full:- +full:build +full:- +full:dir
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2 SOCFPGA Documentation for U-Boot and SPL
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5 This README is about U-Boot and SPL support for Altera's ARM Cortex-A9MPCore
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17 -> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM
19 --------------------------------------------------
20 Generating the handoff header files for U-Boot SPL
21 --------------------------------------------------
25 Updated/working projects should build using either process below.
31 -------------------------------
43 build the project:
45 $ cd path/to/project/dir
46 $ qsys-generate soc_system.qsys --upgrade-ip-cores
47 $ qsys-generate soc_system.qsys --synthesis=[VERILOG|VHDL]
48 $ quartus_sh --flow compile <project name>
52 $ quartus_cpf -c <project_name>.sof soc_system.rbf
61 $ /path/to/bsb/tools/bsp-create-settings --type spl --bsp-dir build \
62 --preloader-settings-dir hps_isw_handoff/soc_system_hps_0/ \
63 --settings build/settings.bsp
65 You should use the bsp "build" directory above (ie, where the settings.bsp file is)
66 in the following u-boot command to update the board headers. Once these headers
67 are updated for a given project build, u-boot should be configured for the
68 project board (eg, de0-nano-sockit) and then build the normal spl build.
79 4. Run QSys [Tools->QSys]
88 5.1 Use Processing -> Start -> Start Analysis & Synthesis (Ctrl+K)
89 5.2 Use Processing -> Start Compilation (Ctrl+L)
96 => bsp-editor
98 6.3.1 Use File -> Open
107 Now that the handoff files are generated, U-Boot can be used to process
108 the handoff files generated by the bsp-editor. For this, please use the
109 following script from the u-boot source tree:
111 $ ./arch/arm/mach-socfpga/qts-filter.sh \
117 Process QTS-generated files into U-Boot compatible ones.
119 soc_type - Type of SoC, either 'cyclone5' or 'arria5'.
120 input_qts_dir - Directory with compiled Quartus project
122 input_bsp_dir - Directory with generated bsp containing
124 output_dir - Directory to store the U-Boot compatible
135 (see output argument of qts-filter.sh command above).
137 Here is an example for the DE-0 Nano SoC after the above rebuild process:
139 $ ll board/terasic/de0-nano-soc/qts/
141 -rw-r--r-- 1 sarnold sarnold 8826 Mar 21 18:11 iocsr_config.h
142 -rw-r--r-- 1 sarnold sarnold 4398 Mar 21 18:11 pinmux_config.h
143 -rw-r--r-- 1 sarnold sarnold 3190 Mar 21 18:11 pll_config.h
144 -rw-r--r-- 1 sarnold sarnold 9022 Mar 21 18:11 sdram_config.h
148 Now your board is ready for full mainline support including U-Boot SPL.