Lines Matching refs:buffer

21 - Flush the buffer after the MPU writes the data and before the DMA is
25 - Invalidate the buffer before starting the DMA. In case there are any dirty
26   lines from the DMA buffer in the cache, subsequent cache-line replacements
27   may corrupt the buffer in memory while the DMA is still going on. Cache-line
30 - Invalidate the buffer after the DMA is complete and before the MPU reads
34   happens with the DMA buffer while DMA is going on we have a coherency problem.
37 - Any buffer that is invalidated(that is, typically the peripheral to
38   memory DMA buffer) should be aligned to cache-line boundary both at
39   at the beginning and at the end of the buffer.
40 - If the buffer is not cache-line aligned invalidation will be restricted
43 - A suitable buffer can be alloced on the stack using the