24 	u32 i, j;  in write_buf_to_ddr()  local
28 	for (i = 0, j = 0; i < length / sizeof(p[0]); i++) {  in write_buf_to_ddr()
29 		p[i] = buful[j];  in write_buf_to_ddr()
40 	u32 i, j;  in cmp_buf_data()  local
48 	for (i = 0, j = 0; i < length / sizeof(p[0]); i++) {  in cmp_buf_data()
49 		val = p[i];  in cmp_buf_data()
51 			flush_dcache_range((ulong)&p[i],  in cmp_buf_data()
52 					   (ulong)&p[i] + sizeof(u32));  in cmp_buf_data()
53 			reread = p[i];  in cmp_buf_data()
54 			err_adr = (ulong)&p[i];  in cmp_buf_data()
72 	u32 i;  in print_memory()  local
74 	for (i = 0; i < size / 4; i += 4) {  in print_memory()
76 		       (ulong)&p[i], p[i], p[i + 1], p[i + 2], p[i + 3]);  in print_memory()
83 	u32 i, j, max_bank = 0;  in get_print_available_addr()  local
87 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {  in get_print_available_addr()
88 		if (gd->bd->bi_dram[i].start)  in get_print_available_addr()
89 			sp_bank = i;  in get_print_available_addr()
92 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {  in get_print_available_addr()
93 		post_dram[i].start = 0;  in get_print_available_addr()
94 		post_dram[i].size = 0;  in get_print_available_addr()
98 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {  in get_print_available_addr()
99 		if (!gd->bd->bi_dram[i].size)  in get_print_available_addr()
101 		post_dram[i].start = gd->bd->bi_dram[i].start;  in get_print_available_addr()
102 		post_dram[i].size = gd->bd->bi_dram[i].size;  in get_print_available_addr()
109 		post_dram[i].start = plat_bidram.base_u64[j];  in get_print_available_addr()
110 		post_dram[i].size = plat_bidram.size_u64[j];  in get_print_available_addr()
111 		i++;  in get_print_available_addr()
114 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {  in get_print_available_addr()
115 		if (post_dram[i].size)  in get_print_available_addr()
116 			max_bank = i + 1;  in get_print_available_addr()
117 		start_adr[i] = 0;  in get_print_available_addr()
118 		length[i] = 0;  in get_print_available_addr()
121 	for (i = 0; i < max_bank; i++) {  in get_print_available_addr()
122 		start_adr[i] = post_dram[i].start;  in get_print_available_addr()
123 		length[i] = post_dram[i].size;  in get_print_available_addr()
126 		if (start_adr[i] == 0 && length[i] > 0x00700000) {  in get_print_available_addr()
127 			start_adr[i] = 0x00700000;  in get_print_available_addr()
128 			length[i] -= 0x00700000;  in get_print_available_addr()
138 		for (i = 0; i < max_bank; i++)  in get_print_available_addr()
139 			if (length[i])  in get_print_available_addr()
141 				       start_adr[i], start_adr[i] + length[i],  in get_print_available_addr()
142 				       length[i]);  in get_print_available_addr()
152 	u32 i, max_bank = 0;  in judge_test_addr()  local
155 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)  in judge_test_addr()
156 		if (start_adr[i])  in judge_test_addr()
157 			max_bank = i + 1;  in judge_test_addr()
162 	for (i = 0; i < max_bank; i++)  in judge_test_addr()
163 		if (arg[0] >= start_adr[i] &&  in judge_test_addr()
164 		    arg[0] + arg[1] <= start_adr[i] + length[i])  in judge_test_addr()
171 		for (i = 1; i < max_bank; i++) {  in judge_test_addr()
172 			start_adr[i] = 0;  in judge_test_addr()
173 			length[i] = 0;  in judge_test_addr()