Lines Matching refs:MB

5 MPC8548 CPU, 8MB boot flash, 64MB user flash and, 256MB DDR2 400MHz
6 memory. It also has 128MB SDRAM 100MHz LBC memory, with both a PCI-e,
69 for 256MB of DDR2 @400MHz.  It does not by default use the DDR2 SPD
98 fix, then you will have to physically remove the LBC 128MB DIMM
127 have U-Boot in the 8MB flash, tied to /CS0.
129 If you are running the default 8MB /CS0 settings but want to store an
141 Finally, if you are running the alternate 64MB /CS0 settings and want
196 and boot U-Boot from the 64MB SODIMM
253 0000_0000	0fff_ffff	MCS0,1	64	DDR2 (256MB)
254 f000_0000	f7ff_ffff	CS3,4	32	LB SDRAM (128MB)
256 fb80_0000	ff7f_ffff	CS6	32	SODIMM flash (64MB) [*]
257 ff80_0000	ffff_ffff	CS0	8	Boot flash (8MB)