19 void fsl_ddr_board_options(memctl_options_t *popts,  in fsl_ddr_board_options()  argument
29 	popts->cpo_override = 0xFF;  in fsl_ddr_board_options()
32 	popts->write_data_delay = 4;  in fsl_ddr_board_options()
34 	popts->clk_adjust = 4;  in fsl_ddr_board_options()
36 	popts->twot_en = 0;  in fsl_ddr_board_options()
39 	popts->half_strength_driver_enable = 1;  in fsl_ddr_board_options()
42 	popts->wrlvl_override = 1;  in fsl_ddr_board_options()
43 	popts->wrlvl_sample = 0xf;  in fsl_ddr_board_options()
44 	popts->wrlvl_start = 0x6;  in fsl_ddr_board_options()
47 	popts->zq_en = 1;  in fsl_ddr_board_options()
50 	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR_ODT_75ohm;  in fsl_ddr_board_options()