Lines Matching refs:rx_tx_status
63 FPGA_SET_REG(fpga, ep.rx_tx_status, status); in io_check_status()
68 FPGA_SET_REG(fpga, ep.rx_tx_status, status); in io_check_status()
114 u16 rx_tx_status; in io_receive() local
116 FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status); in io_receive()
118 while (rx_tx_status & STATE_RX_DATA_AVAILABLE) { in io_receive()
121 if (rx_tx_status & STATE_RX_DATA_LAST) in io_receive()
126 FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status); in io_receive()
138 u16 rx_tx_status; in io_reflect() local
140 FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status); in io_reflect()
142 while (rx_tx_status & STATE_RX_DATA_AVAILABLE) { in io_reflect()
144 if (rx_tx_status & STATE_RX_DATA_LAST) in io_reflect()
147 FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status); in io_reflect()
195 u16 rx_tx_status; in do_ioreflect() local
198 FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status); in do_ioreflect()
200 io_check_status(fpga, rx_tx_status, true); in do_ioreflect()
261 u16 rx_tx_status; in do_ioloop() local
264 FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status); in do_ioloop()
266 io_check_status(fpga, rx_tx_status, false); in do_ioloop()