18 static int select_pll_source_clk(enum pll_type pll, u32 refclk_freq)  in select_pll_source_clk()  argument
40 	switch (pll) {  in select_pll_source_clk()
51 		pll_idx = pll;  in select_pll_source_clk()
82 static int program_pll(enum pll_type pll, u32 refclk_freq, u32 freq0, u32 freq1,  in program_pll()  argument
104 	if (select_pll_source_clk(pll, refclk_freq) < 0) {  in program_pll()
115 	       PLLDIG_PLLDV_MFD(plldv_mfd), PLLDIG_PLLDV(pll));  in program_pll()
117 	writel(readl(PLLDIG_PLLFD(pll)) | PLLDIG_PLLFD_MFN_SET(pllfd_mfn) |  in program_pll()
118 	       PLLDIG_PLLFD_SMDEN, PLLDIG_PLLFD(pll));  in program_pll()
121 	writel(readl(MC_ME_RUNn_MC(0)) | MC_ME_RUNMODE_MC_PLL(pll),  in program_pll()
127 	if ((pll == ARM_PLL) || (pll == ENET_PLL) || (pll == DDR_PLL)) {  in program_pll()
129 		writel(DFS_CTRL_DLL_RESET, DFS_CTRL(pll));  in program_pll()
135 		       DFS_DLLPRG1_V2IGC_SET(0x5), DFS_DLLPRG1(pll));  in program_pll()
141 				       DFS_DVPORTn(pll, i));  in program_pll()
146 		writel(readl(DFS_CTRL(pll)) & ~DFS_CTRL_DLL_RESET,  in program_pll()
147 		       DFS_CTRL(pll));  in program_pll()
148 		writel(readl(DFS_PORTRESET(pll)) &  in program_pll()
150 		       DFS_PORTRESET(pll));  in program_pll()
151 		while ((readl(DFS_PORTSR(pll)) & dfs_on) != dfs_on) ;  in program_pll()