337 	fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR);  in board_eth_init()
338 	fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR);  in board_eth_init()
343 		fm_info_set_phy_address(FM1_DTSEC9, 9);  in board_eth_init()
348 		fm_info_set_phy_address(FM1_DTSEC1,  in board_eth_init()
350 		fm_info_set_phy_address(FM1_DTSEC2,  in board_eth_init()
352 		fm_info_set_phy_address(FM1_DTSEC5,  in board_eth_init()
354 		fm_info_set_phy_address(FM1_DTSEC6,  in board_eth_init()
359 		fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
363 		fm_info_set_phy_address(FM1_DTSEC9, 9);  in board_eth_init()
365 		fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
369 		fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
373 		fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
377 		fm_info_set_phy_address(FM1_DTSEC9, SGMII_CARD_PORT1_PHY_ADDR);  in board_eth_init()
381 		fm_info_set_phy_address(FM1_DTSEC1,  in board_eth_init()
383 		fm_info_set_phy_address(FM1_DTSEC2,  in board_eth_init()
385 		fm_info_set_phy_address(FM1_DTSEC5,  in board_eth_init()
387 		fm_info_set_phy_address(FM1_DTSEC6,  in board_eth_init()
392 		fm_info_set_phy_address(FM1_DTSEC9, 9);  in board_eth_init()
394 		fm_info_set_phy_address(FM1_DTSEC1,  in board_eth_init()
396 		fm_info_set_phy_address(FM1_DTSEC2,  in board_eth_init()
398 		fm_info_set_phy_address(FM1_DTSEC5,  in board_eth_init()
400 		fm_info_set_phy_address(FM1_DTSEC6,  in board_eth_init()
405 		fm_info_set_phy_address(FM1_DTSEC9, 9);  in board_eth_init()
407 		fm_info_set_phy_address(FM1_DTSEC2, 2);  in board_eth_init()
411 		fm_info_set_phy_address(FM1_DTSEC9,  in board_eth_init()
413 		fm_info_set_phy_address(FM1_DTSEC2,  in board_eth_init()
415 		fm_info_set_phy_address(FM1_DTSEC5,  in board_eth_init()
417 		fm_info_set_phy_address(FM1_DTSEC6,  in board_eth_init()