Lines Matching refs:debug
139 debug("BCMSTB SDHCI base address: 0x%p\n", (void *)sdhci_base_address); in board_mmc_init()
168 debug("Arguments from prior stage bootloader:\n"); in board_late_init()
169 debug("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0); in board_late_init()
170 debug("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1); in board_late_init()
171 debug("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2); in board_late_init()
172 debug("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3); in board_late_init()
173 debug("Stack Pointer Register: 0x%x\n", bcmstb_boot_parameters.sp); in board_late_init()
174 debug("Link Register: 0x%x\n", bcmstb_boot_parameters.lr); in board_late_init()
175 debug("Assuming timer frequency register at: 0x%p\n", in board_late_init()
177 debug("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz); in board_late_init()
178 debug("Prior stage provided DTB at: 0x%p\n", in board_late_init()