Lines Matching refs:r4
66 ldr r4, =ESDMISC_SDRAM_RDY
68 ands r1, r1, r4
73 ldr r4, =ACFG_ESDMISC_VAL
74 orr r1, r4, #ESDMISC_MDDR_DL_RST
82 str r4, [r0]
99 ldr r4, =PHYS_SDRAM_1 /* CSD0 base address */
102 1: str r5,[r4] /* run auto-refresh cycle to array 0 */
110 ldr r4, = PHYS_SDRAM_1+ACFG_SDRAM_MODE_REGISTER_VAL
111 strb r2, [r4]
114 ldr r4, =PHYS_SDRAM_1+ACFG_SDRAM_EXT_MODE_REGISTER_VAL
115 strb r5, [r4]
136 ldr r4, =PHYS_SDRAM_2 /* CSD1 base address */
139 1: str r5,[r4] /* run auto-refresh cycle to array 0 */
147 ldr r4, =PHYS_SDRAM_2+ACFG_SDRAM_MODE_REGISTER_VAL
148 strb r2, [r4]
151 ldr r4, =PHYS_SDRAM_2+ACFG_SDRAM_EXT_MODE_REGISTER_VAL
152 strb r2, [r4]