Lines Matching refs:NUM_BYTE_LANES
313 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
944 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
980 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
1016 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
1068 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
1364 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in restore_timings()
1392 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in default_timings()
1417 uint32_t final_delay[NUM_CHANNELS][NUM_BYTE_LANES]; in rcvn_cal()
1428 uint32_t delay[NUM_BYTE_LANES]; in rcvn_cal()
1464 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) in rcvn_cal()
1468 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl += 2) { in rcvn_cal()
1476 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rcvn_cal()
1487 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rcvn_cal()
1494 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rcvn_cal()
1512 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rcvn_cal()
1521 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rcvn_cal()
1528 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl += 2) { in rcvn_cal()
1564 uint32_t final_delay[NUM_CHANNELS][NUM_BYTE_LANES]; in wr_level()
1576 uint32_t delay[NUM_BYTE_LANES]; in wr_level()
1609 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in wr_level()
1636 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor) / 2; bl++) { in wr_level()
1653 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in wr_level()
1671 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor) / 2; bl++) { in wr_level()
1705 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in wr_level()
1727 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in wr_level()
1742 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in wr_level()
1801 uint8_t x_coordinate[2][2][NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES]; in rd_train()
1803 uint8_t y_coordinate[2][2][NUM_CHANNELS][NUM_BYTE_LANES]; in rd_train()
1805 uint8_t x_center[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES]; in rd_train()
1807 uint8_t y_center[NUM_CHANNELS][NUM_BYTE_LANES]; in rd_train()
1813 uint32_t final_delay[NUM_CHANNELS][NUM_BYTE_LANES]; in rd_train()
1830 bl < NUM_BYTE_LANES / bl_divisor; in rd_train()
1845 bl < NUM_BYTE_LANES / bl_divisor; in rd_train()
1885 bl < NUM_BYTE_LANES / bl_divisor; in rd_train()
1907 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in rd_train()
1966 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rd_train()
2018 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in rd_train()
2057 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in rd_train()
2099 uint32_t delay[2][NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES]; in wr_train()
2105 uint32_t final_delay[NUM_CHANNELS][NUM_BYTE_LANES]; in wr_train()
2122 bl < NUM_BYTE_LANES / bl_divisor; in wr_train()
2137 bl < NUM_BYTE_LANES / bl_divisor; in wr_train()
2176 bl < NUM_BYTE_LANES / bl_divisor; in wr_train()
2204 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in wr_train()
2248 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in wr_train()
2287 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in store_timings()
2514 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor) / 2; bl++) { in set_auto_refresh()