Lines Matching refs:channel
127 void training_message(uint8_t channel, uint8_t rank, uint8_t byte_lane) in training_message() argument
130 DPF(D_INFO, "CH%01X RK%01X BL%01X\n", channel, rank, byte_lane); in training_message()
138 void set_rcvn(uint8_t channel, uint8_t rank, in set_rcvn() argument
148 channel, rank, byte_lane, pi_count); in set_rcvn()
156 channel * DDRIODQ_CH_OFFSET; in set_rcvn()
172 channel * DDRIODQ_CH_OFFSET); in set_rcvn()
183 channel * DDRIODQ_CH_OFFSET; in set_rcvn()
201 training_message(channel, rank, byte_lane); in set_rcvn()
214 uint32_t get_rcvn(uint8_t channel, uint8_t rank, uint8_t byte_lane) in get_rcvn() argument
228 channel * DDRIODQ_CH_OFFSET; in get_rcvn()
243 channel * DDRIODQ_CH_OFFSET); in get_rcvn()
262 void set_rdqs(uint8_t channel, uint8_t rank, in set_rdqs() argument
271 channel, rank, byte_lane, pi_count); in set_rdqs()
280 channel * DDRIODQ_CH_OFFSET); in set_rdqs()
287 training_message(channel, rank, byte_lane); in set_rdqs()
300 uint32_t get_rdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane) in get_rdqs() argument
315 channel * DDRIODQ_CH_OFFSET); in get_rdqs()
332 void set_wdqs(uint8_t channel, uint8_t rank, in set_wdqs() argument
342 channel, rank, byte_lane, pi_count); in set_wdqs()
350 channel * DDRIODQ_CH_OFFSET; in set_wdqs()
366 channel * DDRIODQ_CH_OFFSET); in set_wdqs()
377 channel * DDRIODQ_CH_OFFSET; in set_wdqs()
395 training_message(channel, rank, byte_lane); in set_wdqs()
408 uint32_t get_wdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane) in get_wdqs() argument
422 channel * DDRIODQ_CH_OFFSET; in get_wdqs()
437 channel * DDRIODQ_CH_OFFSET); in get_wdqs()
456 void set_wdq(uint8_t channel, uint8_t rank, in set_wdq() argument
466 channel, rank, byte_lane, pi_count); in set_wdq()
474 channel * DDRIODQ_CH_OFFSET; in set_wdq()
490 channel * DDRIODQ_CH_OFFSET); in set_wdq()
501 channel * DDRIODQ_CH_OFFSET; in set_wdq()
519 training_message(channel, rank, byte_lane); in set_wdq()
532 uint32_t get_wdq(uint8_t channel, uint8_t rank, uint8_t byte_lane) in get_wdq() argument
546 channel * DDRIODQ_CH_OFFSET; in get_wdq()
561 channel * DDRIODQ_CH_OFFSET); in get_wdq()
578 void set_wcmd(uint8_t channel, uint32_t pi_count) in set_wcmd() argument
590 reg = CMDPTRREG + channel * DDRIOCCC_CH_OFFSET; in set_wcmd()
610 reg = CMDDLLPICODER1 + channel * DDRIOCCC_CH_OFFSET; in set_wcmd()
616 reg = CMDDLLPICODER0 + channel * DDRIOCCC_CH_OFFSET; /* PO */ in set_wcmd()
624 reg = CMDCFGREG0 + channel * DDRIOCCC_CH_OFFSET; in set_wcmd()
651 uint32_t get_wcmd(uint8_t channel) in get_wcmd() argument
663 reg = CMDPTRREG + channel * DDRIOCCC_CH_OFFSET; in get_wcmd()
682 reg = CMDDLLPICODER1 + channel * DDRIOCCC_CH_OFFSET; in get_wcmd()
699 void set_wclk(uint8_t channel, uint8_t rank, uint32_t pi_count) in set_wclk() argument
712 reg = CCPTRREG + channel * DDRIOCCC_CH_OFFSET; in set_wclk()
726 reg += (channel * DDRIOCCC_CH_OFFSET); in set_wclk()
732 reg += (channel * DDRIOCCC_CH_OFFSET); in set_wclk()
736 reg += (channel * DDRIOCCC_CH_OFFSET); in set_wclk()
740 reg += (channel * DDRIOCCC_CH_OFFSET); in set_wclk()
748 reg = CCCFGREG1 + channel * DDRIOCCC_CH_OFFSET; in set_wclk()
775 uint32_t get_wclk(uint8_t channel, uint8_t rank) in get_wclk() argument
788 reg = CCPTRREG + channel * DDRIOCCC_CH_OFFSET; in get_wclk()
802 reg += (channel * DDRIOCCC_CH_OFFSET); in get_wclk()
820 void set_wctl(uint8_t channel, uint8_t rank, uint32_t pi_count) in set_wctl() argument
833 reg = CCPTRREG + channel * DDRIOCCC_CH_OFFSET; in set_wctl()
846 reg = ECCB1DLLPICODER0 + channel * DDRIOCCC_CH_OFFSET; in set_wctl()
851 reg = ECCB1DLLPICODER1 + channel * DDRIOCCC_CH_OFFSET; in set_wctl()
854 reg = ECCB1DLLPICODER2 + channel * DDRIOCCC_CH_OFFSET; in set_wctl()
857 reg = ECCB1DLLPICODER3 + channel * DDRIOCCC_CH_OFFSET; in set_wctl()
865 reg = CCCFGREG1 + channel * DDRIOCCC_CH_OFFSET; in set_wctl()
894 uint32_t get_wctl(uint8_t channel, uint8_t rank) in get_wctl() argument
907 reg = CCPTRREG + channel * DDRIOCCC_CH_OFFSET; in get_wctl()
920 reg = ECCB1DLLPICODER0 + channel * DDRIOCCC_CH_OFFSET; in get_wctl()
937 void set_vref(uint8_t channel, uint8_t byte_lane, uint32_t setting) in set_vref() argument
944 channel, byte_lane, setting); in set_vref()
946 mrc_alt_write_mask(DDRPHY, reg + channel * DDRIODQ_CH_OFFSET + in set_vref()
965 uint32_t get_vref(uint8_t channel, uint8_t byte_lane) in get_vref() argument
974 temp = msg_port_alt_read(DDRPHY, reg + channel * DDRIODQ_CH_OFFSET + in get_vref()
995 uint32_t get_addr(uint8_t channel, uint8_t rank) in get_addr() argument
1000 if (channel > 0) { in get_addr()
1023 uint32_t sample_dqs(struct mrc_params *mrc_params, uint8_t channel, in sample_dqs() argument
1037 uint32_t address = get_addr(channel, rank); in sample_dqs()
1058 channel * DDRIODQ_CH_OFFSET); in sample_dqs()
1091 uint8_t channel, uint8_t rank, bool rcvn) in find_rising_edge() argument
1115 set_rcvn(channel, rank, bl, in find_rising_edge()
1118 set_wdqs(channel, rank, bl, in find_rising_edge()
1125 channel, rank, rcvn); in find_rising_edge()
1129 rcvn ? "RCVN" : "WDQS", channel, rank, sample, in find_rising_edge()
1188 set_rcvn(channel, rank, bl, delay[bl]); in find_rising_edge()
1190 set_wdqs(channel, rank, bl, delay[bl]); in find_rising_edge()
1200 temp = sample_dqs(mrc_params, channel, rank, rcvn); in find_rising_edge()
1213 set_rcvn(channel, rank, in find_rising_edge()
1216 set_wdqs(channel, rank, in find_rising_edge()
1230 set_rcvn(channel, rank, in find_rising_edge()
1233 set_wdqs(channel, rank, in find_rising_edge()
1354 uint8_t channel; in clear_pointers() local
1359 for (channel = 0; channel < NUM_CHANNELS; channel++) { in clear_pointers()
1363 channel * DDRIODQ_CH_OFFSET + in clear_pointers()
1369 channel * DDRIODQ_CH_OFFSET + in clear_pointers()
1378 static void print_timings_internal(uint8_t algo, uint8_t channel, uint8_t rank, in print_timings_internal() argument
1385 DPF(D_INFO, "\nRCVN[%02d:%02d]", channel, rank); in print_timings_internal()
1388 DPF(D_INFO, "\nWDQS[%02d:%02d]", channel, rank); in print_timings_internal()
1391 DPF(D_INFO, "\nWDQx[%02d:%02d]", channel, rank); in print_timings_internal()
1394 DPF(D_INFO, "\nRDQS[%02d:%02d]", channel, rank); in print_timings_internal()
1397 DPF(D_INFO, "\nVREF[%02d:%02d]", channel, rank); in print_timings_internal()
1400 DPF(D_INFO, "\nWCMD[%02d:%02d]", channel, rank); in print_timings_internal()
1403 DPF(D_INFO, "\nWCTL[%02d:%02d]", channel, rank); in print_timings_internal()
1406 DPF(D_INFO, "\nWCLK[%02d:%02d]", channel, rank); in print_timings_internal()
1415 DPF(D_INFO, " %03d", get_rcvn(channel, rank, bl)); in print_timings_internal()
1418 DPF(D_INFO, " %03d", get_wdqs(channel, rank, bl)); in print_timings_internal()
1421 DPF(D_INFO, " %03d", get_wdq(channel, rank, bl)); in print_timings_internal()
1424 DPF(D_INFO, " %03d", get_rdqs(channel, rank, bl)); in print_timings_internal()
1427 DPF(D_INFO, " %03d", get_vref(channel, bl)); in print_timings_internal()
1430 DPF(D_INFO, " %03d", get_wcmd(channel)); in print_timings_internal()
1433 DPF(D_INFO, " %03d", get_wctl(channel, rank)); in print_timings_internal()
1436 DPF(D_INFO, " %03d", get_wclk(channel, rank)); in print_timings_internal()
1447 uint8_t channel; in print_timings() local
1456 for (channel = 0; channel < NUM_CHANNELS; channel++) { in print_timings()
1457 if (mrc_params->channel_enables & (1 << channel)) { in print_timings()
1462 channel, rank, in print_timings()