Lines Matching refs:dev
19 static void common_sata_init(struct udevice *dev, unsigned int port_map) in common_sata_init() argument
26 dm_pci_write_config32(dev, IDE_CONFIG, reg32); in common_sata_init()
29 dm_pci_read_config16(dev, 0x92, ®16); in common_sata_init()
32 dm_pci_write_config16(dev, 0x92, reg16); in common_sata_init()
36 dm_pci_write_config32(dev, 0x94, ((port_map ^ 0x3f) << 24) | 0x183); in common_sata_init()
39 static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch) in bd82x6x_sata_init() argument
43 int node = dev_of_offset(dev); in bd82x6x_sata_init()
62 dm_pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | in bd82x6x_sata_init()
65 dm_pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | in bd82x6x_sata_init()
69 dm_pci_write_config16(dev, IDE_SDMA_CNT, IDE_PSDE0); in bd82x6x_sata_init()
70 dm_pci_write_config16(dev, IDE_SDMA_TIM, 0x0001); in bd82x6x_sata_init()
72 common_sata_init(dev, 0x8000 | port_map); in bd82x6x_sata_init()
75 abar = dm_pci_read_bar32(dev, 5); in bd82x6x_sata_init()
103 dm_pci_write_bar32(dev, 5, 0x00000000); in bd82x6x_sata_init()
105 dm_pci_read_config16(dev, PCI_COMMAND, ®16); in bd82x6x_sata_init()
107 dm_pci_write_config16(dev, PCI_COMMAND, reg16); in bd82x6x_sata_init()
109 dm_pci_write_config8(dev, 0x09, 0x80); in bd82x6x_sata_init()
112 dm_pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | in bd82x6x_sata_init()
114 dm_pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | in bd82x6x_sata_init()
119 dm_pci_write_config16(dev, IDE_SDMA_CNT, IDE_SSDE0); in bd82x6x_sata_init()
120 dm_pci_write_config16(dev, IDE_SDMA_TIM, 0x0200); in bd82x6x_sata_init()
122 common_sata_init(dev, port_map); in bd82x6x_sata_init()
127 dm_pci_write_bar32(dev, 5, 0x00000000); in bd82x6x_sata_init()
130 dm_pci_read_config16(dev, PCI_COMMAND, ®16); in bd82x6x_sata_init()
132 dm_pci_write_config16(dev, PCI_COMMAND, reg16); in bd82x6x_sata_init()
138 dm_pci_write_config8(dev, 0x09, 0x8f); in bd82x6x_sata_init()
141 dm_pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | in bd82x6x_sata_init()
144 dm_pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | in bd82x6x_sata_init()
149 dm_pci_write_config16(dev, IDE_SDMA_CNT, IDE_SSDE0 | IDE_PSDE0); in bd82x6x_sata_init()
150 dm_pci_write_config16(dev, IDE_SDMA_TIM, 0x0201); in bd82x6x_sata_init()
152 common_sata_init(dev, port_map); in bd82x6x_sata_init()
165 pch_common_sir_write(dev, 0x04, 0x00001600); in bd82x6x_sata_init()
166 pch_common_sir_write(dev, 0x28, 0xa0000033); in bd82x6x_sata_init()
167 reg32 = pch_common_sir_read(dev, 0x54); in bd82x6x_sata_init()
170 pch_common_sir_write(dev, 0x54, reg32); in bd82x6x_sata_init()
171 pch_common_sir_write(dev, 0x64, 0xcccc8484); in bd82x6x_sata_init()
172 reg32 = pch_common_sir_read(dev, 0x68); in bd82x6x_sata_init()
175 pch_common_sir_write(dev, 0x68, reg32); in bd82x6x_sata_init()
176 reg32 = pch_common_sir_read(dev, 0x78); in bd82x6x_sata_init()
179 pch_common_sir_write(dev, 0x78, reg32); in bd82x6x_sata_init()
180 pch_common_sir_write(dev, 0x84, 0x001c7000); in bd82x6x_sata_init()
181 pch_common_sir_write(dev, 0x88, 0x88338822); in bd82x6x_sata_init()
182 pch_common_sir_write(dev, 0xa0, 0x001c7000); in bd82x6x_sata_init()
183 pch_common_sir_write(dev, 0xc4, 0x0c0c0c0c); in bd82x6x_sata_init()
184 pch_common_sir_write(dev, 0xc8, 0x0c0c0c0c); in bd82x6x_sata_init()
185 pch_common_sir_write(dev, 0xd4, 0x10000000); in bd82x6x_sata_init()
191 static void bd82x6x_sata_enable(struct udevice *dev) in bd82x6x_sata_enable() argument
194 int node = dev_of_offset(dev); in bd82x6x_sata_enable()
209 dm_pci_write_config16(dev, 0x90, map); in bd82x6x_sata_enable()
212 static int bd82x6x_sata_bind(struct udevice *dev) in bd82x6x_sata_bind() argument
218 ret = ahci_bind_scsi(dev, &scsi_dev); in bd82x6x_sata_bind()
226 static int bd82x6x_sata_probe(struct udevice *dev) in bd82x6x_sata_probe() argument
236 bd82x6x_sata_enable(dev); in bd82x6x_sata_probe()
238 bd82x6x_sata_init(dev, pch); in bd82x6x_sata_probe()
239 ret = ahci_probe_scsi_pci(dev); in bd82x6x_sata_probe()