24 	printf("\nSystem Configuration registers\n"  in print_reginfo()
27 	printf("\tSIUMCR\t0x%08X", in_be32(&sysconf->sc_siumcr));  in print_reginfo()
28 	printf("\tSYPCR\t0x%08X\n", in_be32(&sysconf->sc_sypcr));  in print_reginfo()
30 	printf("\tSWT\t0x%08X", in_be32(&sysconf->sc_swt));  in print_reginfo()
31 	printf("\tSWSR\t0x%04X\n", in_be16(&sysconf->sc_swsr));  in print_reginfo()
33 	printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n",  in print_reginfo()
35 	printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n",  in print_reginfo()
37 	printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",  in print_reginfo()
40 	printf("Memory Controller Registers\n");  in print_reginfo()
41 	printf("\tBR0\t0x%08X\tOR0\t0x%08X\n", in_be32(&memctl->memc_br0),  in print_reginfo()
43 	printf("\tBR1\t0x%08X\tOR1\t0x%08X\n", in_be32(&memctl->memc_br1),  in print_reginfo()
45 	printf("\tBR2\t0x%08X\tOR2\t0x%08X\n", in_be32(&memctl->memc_br2),  in print_reginfo()
47 	printf("\tBR3\t0x%08X\tOR3\t0x%08X\n", in_be32(&memctl->memc_br3),  in print_reginfo()
49 	printf("\tBR4\t0x%08X\tOR4\t0x%08X\n", in_be32(&memctl->memc_br4),  in print_reginfo()
51 	printf("\tBR5\t0x%08X\tOR5\t0x%08X\n", in_be32(&memctl->memc_br5),  in print_reginfo()
53 	printf("\tBR6\t0x%08X\tOR6\t0x%08X\n", in_be32(&memctl->memc_br6),  in print_reginfo()
55 	printf("\tBR7\t0x%08X\tOR7\t0x%08X\n", in_be32(&memctl->memc_br7),  in print_reginfo()
57 	printf("\n\tmamr\t0x%08X\tmbmr\t0x%08X\n", in_be32(&memctl->memc_mamr),  in print_reginfo()
59 	printf("\tmstat\t0x%04X\tmptpr\t0x%04X\n", in_be16(&memctl->memc_mstat),  in print_reginfo()
61 	printf("\tmdr\t0x%08X\n", in_be32(&memctl->memc_mdr));  in print_reginfo()
63 	printf("\nSystem Integration Timers\n");  in print_reginfo()
64 	printf("\tTBSCR\t0x%04X\tRTCSC\t0x%04X\n",  in print_reginfo()
66 	printf("\tPISCR\t0x%04X\n", in_be16(&timers->sit_piscr));  in print_reginfo()