Lines Matching refs:SGMII_FM1_DTSEC10
26 {0xC8, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
29 {0xD6, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
36 {0xF2, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
38 {0xF8, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
40 {0xFA, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
46 {0x1B, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
50 {0x1C, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
54 {0x95, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
58 {0xA2, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
62 {0x94, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
104 {0xA6, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
107 {0x8E, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
110 {0x8F, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
113 {0x82, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
116 {0x83, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
119 {0xA4, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
122 {0x96, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
125 {0x8A, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
135 {0xD9, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
138 {0xD2, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
141 {0xD3, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
144 {0xCB, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
147 {0xD8, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
155 {0xCA, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,