30 	printf(" (DDR%d", ((ddr->sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK)  in board_add_ram_info()
34 	if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_16)  in board_add_ram_info()
36 	else if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_32)  in board_add_ram_info()
41 	if (ddr->sdram_cfg & SDRAM_CFG_32_BE)  in board_add_ram_info()
47 	if (ddr->sdram_cfg & SDRAM_CFG_ECC_EN)  in board_add_ram_info()
149 	unsigned int sdram_cfg;  in spd_sdram()  local
157 	clrsetbits_be32(&ddr->sdram_cfg, SDRAM_CFG_MEM_EN, 0);  in spd_sdram()
790 	sdram_cfg = (0  in spd_sdram()
798 		sdram_cfg |= SDRAM_CFG_RD_EN;  in spd_sdram()
803 			sdram_cfg |= SDRAM_CFG_32_BE | SDRAM_CFG_8_BE;  in spd_sdram()
805 			sdram_cfg |= SDRAM_CFG_32_BE;  in spd_sdram()
813 		sdram_cfg |= 0x20000000;  in spd_sdram()
832 	sdram_cfg |= SDRAM_CFG_2T_EN;  in spd_sdram()
835 	ddr->sdram_cfg = sdram_cfg;  in spd_sdram()
839 	debug("DDR:sdram_cfg=0x%08x\n", ddr->sdram_cfg);  in spd_sdram()