Lines Matching defs:int1_ctrl
60 typedef struct int1_ctrl { struct
62 u32 iprh1; /* 0x00 Pending High */
63 u32 iprl1; /* 0x04 Pending Low */
64 u32 imrh1; /* 0x08 Mask High */
65 u32 imrl1; /* 0x0C Mask Low */
66 u32 frch1; /* 0x10 Force High */
67 u32 frcl1; /* 0x14 Force Low */
69 u8 irlr; /* 0x18 */
70 u8 iacklpr; /* 0x19 */
71 u16 res1[19]; /* 0x1a - 0x3c */
73 u16 res1; /* 0x18 */
74 u16 icfg1; /* 0x1A Configuration */
75 u8 simr1; /* 0x1C Set Interrupt Mask */
76 u8 cimr1; /* 0x1D Clear Interrupt Mask */
77 u16 res2; /* 0x1E - 0x1F */
78 u32 res3[8]; /* 0x20 - 0x3F */
80 u8 icr1[64]; /* 0x40 - 0x7F */
81 u32 res4[24]; /* 0x80 - 0xDF */
82 u8 swiack1; /* 0xE0 Software Interrupt ack */
83 u8 res5[3]; /* 0xE1 - 0xE3 */
84 u8 L1iack1; /* 0xE4 Level n interrupt ack */
85 u8 res6[3]; /* 0xE5 - 0xE7 */
86 u8 L2iack1; /* 0xE8 Level n interrupt ack */
87 u8 res7[3]; /* 0xE9 - 0xEB */
88 u8 L3iack1; /* 0xEC Level n interrupt ack */
89 u8 res8[3]; /* 0xED - 0xEF */
90 u8 L4iack1; /* 0xF0 Level n interrupt ack */
91 u8 res9[3]; /* 0xF1 - 0xF3 */
92 u8 L5iack1; /* 0xF4 Level n interrupt ack */
93 u8 resa[3]; /* 0xF5 - 0xF7 */
94 u8 L6iack1; /* 0xF8 Level n interrupt ack */
95 u8 resb[3]; /* 0xF9 - 0xFB */
96 u8 L7iack1; /* 0xFC Level n interrupt ack */
97 u8 resc[3]; /* 0xFD - 0xFF */