26 int pci_##rw##_cfg_##size(struct pci_controller *hose,			\
32 	out_be32(hose->cfg_addr, addr);					\
33 	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);	\
36 	out_be32(hose->cfg_addr, addr & 0x7fffffff);			\
46 int pci_read_cfg_dword(struct pci_controller *hose, pci_dev_t dev,  in pci_read_cfg_dword()  argument
54 	out_be32(hose->cfg_addr, addr);  in pci_read_cfg_dword()
55 	*val = (u32) in_le16((u16 *) (hose->cfg_data + (offset & mask)));  in pci_read_cfg_dword()
57 	out_be32(hose->cfg_addr, addr & 0x7fffffff);  in pci_read_cfg_dword()
62 	out_be32(hose->cfg_addr, addr);  in pci_read_cfg_dword()
63 	tmpv = (u32) in_le16((u16 *) (hose->cfg_data + (offset & mask)));  in pci_read_cfg_dword()
65 	out_be32(hose->cfg_addr, addr & 0x7fffffff);  in pci_read_cfg_dword()
73 void pci_mcf547x_8x_init(struct pci_controller *hose)  in pci_mcf547x_8x_init()  argument
128 	hose->first_busno = 0;  in pci_mcf547x_8x_init()
129 	hose->last_busno = 0xff;  in pci_mcf547x_8x_init()
131 	pci_set_region(hose->regions + 0, CONFIG_SYS_PCI_MEM_BUS, CONFIG_SYS_PCI_MEM_PHYS,  in pci_mcf547x_8x_init()
134 	pci_set_region(hose->regions + 1, CONFIG_SYS_PCI_IO_BUS, CONFIG_SYS_PCI_IO_PHYS,  in pci_mcf547x_8x_init()
137 	pci_set_region(hose->regions + 2, CONFIG_SYS_PCI_SYS_MEM_BUS,  in pci_mcf547x_8x_init()
141 	hose->region_count = 3;  in pci_mcf547x_8x_init()
143 	hose->cfg_addr = &(pci->car);  in pci_mcf547x_8x_init()
144 	hose->cfg_data = (volatile unsigned char *)CONFIG_SYS_PCI_CFG_BUS;  in pci_mcf547x_8x_init()
146 	pci_set_ops(hose, pci_read_cfg_byte, pci_read_cfg_word,  in pci_mcf547x_8x_init()
151 	pci_register_hose(hose);  in pci_mcf547x_8x_init()
152 	hose->last_busno = pci_hose_scan(hose);  in pci_mcf547x_8x_init()