Lines Matching refs:setbits_8
252 setbits_8(&gpio->par_uart0, in uart_port_conf()
260 setbits_8(&gpio->par_uart1, in uart_port_conf()
268 setbits_8(&gpio->par_uart2, in uart_port_conf()
276 setbits_8(&gpio->par_dspi0, in uart_port_conf()
284 setbits_8(&gpio->par_uart0, in uart_port_conf()
292 setbits_8(&gpio->par_uart1, in uart_port_conf()
300 setbits_8(&gpio->par_uart2, in uart_port_conf()
308 setbits_8(&gpio->par_ssi0h, GPIO_PAR_SSI0H_FS_U7TXD); in uart_port_conf()
309 setbits_8(&gpio->par_ssi0l, GPIO_PAR_SSI0L_BCLK_U7RXD); in uart_port_conf()
316 setbits_8(&gpio->par_cani2c, in uart_port_conf()
324 setbits_8(&gpio->par_cani2c, in uart_port_conf()
332 setbits_8(&gpio->par_uart, in uart_port_conf()
339 setbits_8(&gpio->par_uart, in uart_port_conf()
352 setbits_8(&gpio->par_timer, in uart_port_conf()
357 setbits_8(&gpio->par_timer, in uart_port_conf()
388 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_RMII_GPIO); in fecpin_setclear()
390 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC1_RMII_ATA); in fecpin_setclear()
397 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_MII); in fecpin_setclear()
403 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC1_MII); in fecpin_setclear()
468 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); in cfspi_claim_bus()
472 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); in cfspi_claim_bus()
476 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); in cfspi_claim_bus()
480 setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3); in cfspi_claim_bus()
484 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); in cfspi_claim_bus()
493 setbits_8(&gpio->par_dspi0, GPIO_PAR_DSPI0_PCS0_DSPI0PCS0); in cfspi_claim_bus()
497 setbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); in cfspi_claim_bus()