142 static void ddrphy_init(void __iomem *phy_base, enum dram_freq freq, int width,  in ddrphy_init()  argument
160 	tmp = ddrphy_pgcr2[freq];  in ddrphy_init()
165 	writel(ddrphy_ptr0[freq], phy_base + MPHY_PTR0);  in ddrphy_init()
166 	writel(ddrphy_ptr1[freq], phy_base + MPHY_PTR1);  in ddrphy_init()
168 	writel(ddrphy_ptr3[freq], phy_base + MPHY_PTR3);  in ddrphy_init()
169 	writel(ddrphy_ptr4[freq], phy_base + MPHY_PTR4);  in ddrphy_init()
182 	writel(ddrphy_dtpr0[freq], phy_base + MPHY_DTPR0);  in ddrphy_init()
183 	writel(ddrphy_dtpr1[freq], phy_base + MPHY_DTPR1);  in ddrphy_init()
184 	writel(ddrphy_dtpr2[freq], phy_base + MPHY_DTPR2);  in ddrphy_init()
185 	writel(ddrphy_dtpr3[freq], phy_base + MPHY_DTPR3);  in ddrphy_init()
186 	writel(ddrphy_mr0[freq], phy_base + MPHY_MR0);  in ddrphy_init()
188 	writel(ddrphy_mr2[freq], phy_base + MPHY_MR2);  in ddrphy_init()
463 static int umc_dc_init(void __iomem *dc_base, enum dram_freq freq,  in umc_dc_init()  argument
485 	writel(umc_cmdctla[freq], dc_base + UMC_CMDCTLA);  in umc_dc_init()
487 	writel(ch == 2 ? umc_cmdctlb_ch2[freq] : umc_cmdctlb_ch01[freq],  in umc_dc_init()
490 	writel(umc_spcctla[freq][size_e], dc_base + UMC_SPCCTLA);  in umc_dc_init()
491 	writel(umc_spcctlb[freq], dc_base + UMC_SPCCTLB);  in umc_dc_init()
518 	writel(ch == 2 ? umc_flowctla_ch2[freq] : umc_flowctla_ch01[freq],  in umc_dc_init()
542 static int umc_ch_init(void __iomem *umc_ch_base, enum dram_freq freq,  in umc_ch_init()  argument
557 	ddrphy_init(phy_base, freq, width, ch);  in umc_ch_init()
567 	ret = umc_dc_init(dc_base, freq, size, width, ch);  in umc_ch_init()
607 	enum dram_freq freq;  in uniphier_pxs2_umc_init()  local
612 		freq = DRAM_FREQ_1866M;  in uniphier_pxs2_umc_init()
615 		freq = DRAM_FREQ_2133M;  in uniphier_pxs2_umc_init()
627 			ret = umc_ch_init(umc_ch_base, freq,  in uniphier_pxs2_umc_init()