35 	u32 tmp;  in uniphier_ld20_sscpll_init()  local
42 		tmp = readl(base);	/* SSCPLLCTRL */  in uniphier_ld20_sscpll_init()
43 		tmp &= ~SC_PLLCTRL_SSC_DK_MASK;  in uniphier_ld20_sscpll_init()
44 		tmp |= (487 * freq * ssc_rate / divn / 512) &  in uniphier_ld20_sscpll_init()
46 		writel(tmp, base);  in uniphier_ld20_sscpll_init()
48 		tmp = readl(base + 4);  in uniphier_ld20_sscpll_init()
49 		tmp &= ~SC_PLLCTRL2_SSC_JK_MASK;  in uniphier_ld20_sscpll_init()
50 		tmp |= (41859 * freq / divn) & SC_PLLCTRL2_SSC_JK_MASK;  in uniphier_ld20_sscpll_init()
55 	tmp = readl(base + 4);		/* SSCPLLCTRL2 */  in uniphier_ld20_sscpll_init()
56 	tmp |= SC_PLLCTRL2_NRSTDS;  in uniphier_ld20_sscpll_init()
57 	writel(tmp, base + 4);  in uniphier_ld20_sscpll_init()
67 	u32 tmp;  in uniphier_ld20_sscpll_ssc_en()  local
73 	tmp = readl(base);	/* SSCPLLCTRL */  in uniphier_ld20_sscpll_ssc_en()
74 	tmp |= SC_PLLCTRL_SSC_EN;  in uniphier_ld20_sscpll_ssc_en()
75 	writel(tmp, base);  in uniphier_ld20_sscpll_ssc_en()
85 	u32 tmp;  in uniphier_ld20_sscpll_set_regi()  local
91 	tmp = readl(base + 8);	/* SSCPLLCTRL3 */  in uniphier_ld20_sscpll_set_regi()
92 	tmp &= ~SC_PLLCTRL3_REGI_MASK;  in uniphier_ld20_sscpll_set_regi()
93 	tmp |= regi << SC_PLLCTRL3_REGI_SHIFT;  in uniphier_ld20_sscpll_set_regi()
94 	writel(tmp, base + 8);  in uniphier_ld20_sscpll_set_regi()
104 	u32 tmp;  in uniphier_ld20_vpll27_init()  local
110 	tmp = readl(base);		/* VPLL27CTRL */  in uniphier_ld20_vpll27_init()
111 	tmp |= SC_VPLL27CTRL_WP;	/* write protect off */  in uniphier_ld20_vpll27_init()
112 	writel(tmp, base);  in uniphier_ld20_vpll27_init()
114 	tmp = readl(base + 8);		/* VPLL27CTRL3 */  in uniphier_ld20_vpll27_init()
115 	tmp |= SC_VPLL27CTRL3_K_LD;  in uniphier_ld20_vpll27_init()
116 	writel(tmp, base + 8);  in uniphier_ld20_vpll27_init()
118 	tmp = readl(base);		/* VPLL27CTRL */  in uniphier_ld20_vpll27_init()
119 	tmp &= ~SC_VPLL27CTRL_WP;	/* write protect on */  in uniphier_ld20_vpll27_init()
120 	writel(tmp, base);  in uniphier_ld20_vpll27_init()
130 	u32 tmp;  in uniphier_ld20_dspll_init()  local
136 	tmp = readl(base + 4);		/* DSPLLCTRL2 */  in uniphier_ld20_dspll_init()
137 	tmp |= SC_DSPLLCTRL2_K_LD;  in uniphier_ld20_dspll_init()
138 	writel(tmp, base + 4);  in uniphier_ld20_dspll_init()