Lines Matching refs:clock_set_enable
132 clock_set_enable(PERIPH_ID_CACHE2, 1); in t114_init_clocks()
133 clock_set_enable(PERIPH_ID_GPIO, 1); in t114_init_clocks()
134 clock_set_enable(PERIPH_ID_TMR, 1); in t114_init_clocks()
135 clock_set_enable(PERIPH_ID_RTC, 1); in t114_init_clocks()
136 clock_set_enable(PERIPH_ID_CPU, 1); in t114_init_clocks()
137 clock_set_enable(PERIPH_ID_EMC, 1); in t114_init_clocks()
138 clock_set_enable(PERIPH_ID_I2C5, 1); in t114_init_clocks()
139 clock_set_enable(PERIPH_ID_FUSE, 1); in t114_init_clocks()
140 clock_set_enable(PERIPH_ID_PMC, 1); in t114_init_clocks()
141 clock_set_enable(PERIPH_ID_APBDMA, 1); in t114_init_clocks()
142 clock_set_enable(PERIPH_ID_MEM, 1); in t114_init_clocks()
143 clock_set_enable(PERIPH_ID_IRAMA, 1); in t114_init_clocks()
144 clock_set_enable(PERIPH_ID_IRAMB, 1); in t114_init_clocks()
145 clock_set_enable(PERIPH_ID_IRAMC, 1); in t114_init_clocks()
146 clock_set_enable(PERIPH_ID_IRAMD, 1); in t114_init_clocks()
147 clock_set_enable(PERIPH_ID_CORESIGHT, 1); in t114_init_clocks()
148 clock_set_enable(PERIPH_ID_MSELECT, 1); in t114_init_clocks()
149 clock_set_enable(PERIPH_ID_EMC1, 1); in t114_init_clocks()
150 clock_set_enable(PERIPH_ID_MC1, 1); in t114_init_clocks()
151 clock_set_enable(PERIPH_ID_DVFS, 1); in t114_init_clocks()