Lines Matching refs:r5

42 	mrc	p15, 0, r5, c1, c1, 0	@ Read SCR
43 	bic	r5, r5, #1		@ Secure mode
44 	mcr	p15, 0, r5, c1, c1, 0	@ Write SCR
49 	ldr	r5, [r4]
50 	orr	r5, r5, #NS_RST_VEC_WR_DIS
51 	str	r5, [r4]
55 	adr	r5, _sys_clock_freq
59 	streq	r7, [r5]
61 	ldrne	r7, [r5]
78 	mov	r5, #(CSR_ENABLE)
80 	add	r5, r4, lsl r0
81 	str	r5, [r6, r2]
88 	push	{r4, r5, r6, lr}
97 	ldr	r5, =psci_cpu_entry
98 	str	r5, [r6]
103 	mov	r5, #(CSR_IMMEDIATE_WAKE | CSR_ENABLE)
104 	str	r5, [r6, r2]
107 	pop	{r4, r5, r6, pc}