Lines Matching refs:mctl_com

90 	struct sunxi_mctl_com_reg * const mctl_com =  in mbus_configure_port()  local
102 writel(cfg0, &mctl_com->mcr[port][0]); in mbus_configure_port()
103 writel(cfg1, &mctl_com->mcr[port][1]); in mbus_configure_port()
112 struct sunxi_mctl_com_reg * const mctl_com = in mctl_set_master_priority_h3() local
116 writel((1 << 16) | (400 << 0), &mctl_com->bwcr); in mctl_set_master_priority_h3()
119 writel(0x00000001, &mctl_com->mapr); in mctl_set_master_priority_h3()
137 struct sunxi_mctl_com_reg * const mctl_com = in mctl_set_master_priority_a64() local
141 writel(399, &mctl_com->tmr); in mctl_set_master_priority_a64()
142 writel((1 << 16), &mctl_com->bwcr); in mctl_set_master_priority_a64()
159 writel(0x81000004, &mctl_com->mdfs_bwlr[2]); in mctl_set_master_priority_a64()
164 struct sunxi_mctl_com_reg * const mctl_com = in mctl_set_master_priority_h5() local
168 writel(399, &mctl_com->tmr); in mctl_set_master_priority_h5()
169 writel((1 << 16), &mctl_com->bwcr); in mctl_set_master_priority_h5()
172 writel(0x00000001, &mctl_com->mapr); in mctl_set_master_priority_h5()
192 struct sunxi_mctl_com_reg * const mctl_com = in mctl_set_master_priority_r40() local
196 writel(399, &mctl_com->tmr); in mctl_set_master_priority_r40()
197 writel((1 << 16), &mctl_com->bwcr); in mctl_set_master_priority_r40()
200 writel(0x00000001, &mctl_com->mapr); in mctl_set_master_priority_r40()
337 struct sunxi_mctl_com_reg * const mctl_com = in mctl_set_cr() local
354 MCTL_CR_ROW_BITS(para->row_bits), &mctl_com->cr); in mctl_set_cr()
361 setbits_le32(&mctl_com->cr_r1, MCTL_CR_R1_MUX_A15); in mctl_set_cr()
422 struct sunxi_mctl_com_reg * const mctl_com = in mctl_channel_init() local
441 writel(PROTECT_MAGIC, &mctl_com->protect); in mctl_channel_init()
444 writel(0x0, &mctl_com->protect); in mctl_channel_init()
580 writel(0xffffffff, &mctl_com->maer); in mctl_channel_init()
687 struct sunxi_mctl_com_reg * const mctl_com = in sunxi_dram_init() local
760 setbits_le32(&mctl_com->cccr, 1 << 31); in sunxi_dram_init()