Lines Matching refs:clrsetbits_le32
284 clrsetbits_le32(&mctl_ctl->zqcr, 0xffff, in mctl_h3_zq_calibration_quirk()
386 clrsetbits_le32(&ccm->dram_clk_cfg, in mctl_sys_init()
394 clrsetbits_le32(&ccm->dram_clk_cfg, in mctl_sys_init()
438 clrsetbits_le32(&mctl_ctl->pgcr[1], 1 << 24, 1 << 26); in mctl_channel_init()
443 clrsetbits_le32(&mctl_ctl->upd2, 0xfff << 16, 0x50 << 16); in mctl_channel_init()
458 clrsetbits_le32(&mctl_ctl->dx[i].gcr, clearmask, setmask); in mctl_channel_init()
462 clrsetbits_le32(&mctl_ctl->aciocr, socid == SOCID_H5 ? (0x1 << 11) : 0, in mctl_channel_init()
473 clrsetbits_le32(&mctl_ctl->pgcr[2], (0x3 << 10) | (0x3 << 8), in mctl_channel_init()
477 clrsetbits_le32(&mctl_ctl->pgcr[2], (0x3 << 10) | (0x3 << 8), in mctl_channel_init()
484 clrsetbits_le32(&mctl_ctl->pgcr[2], (0x3 << 10) | (0x3 << 8), in mctl_channel_init()
501 clrsetbits_le32(&mctl_ctl->dtcr, 0xf << 24, in mctl_channel_init()
513 clrsetbits_le32(&mctl_ctl->zqcr, 0xffffff, CONFIG_DRAM_ZQ); in mctl_channel_init()
519 clrsetbits_le32(&mctl_ctl->zqcr, 0xffffff, CONFIG_DRAM_ZQ); in mctl_channel_init()
533 clrsetbits_le32(&mctl_ctl->dtcr, 0xf << 24, 0x1 << 24); in mctl_channel_init()