84 		readl(&clock_manager_base->per_pll.en),  in cm_basic_init()
85 		&clock_manager_base->per_pll.en);  in cm_basic_init()
99 	writel(0, &clock_manager_base->per_pll.en);  in cm_basic_init()
111 	       &clock_manager_base->per_pll.vco);  in cm_basic_init()
124 	       &clock_manager_base->per_pll.src);  in cm_basic_init()
130 	readl(&clock_manager_base->per_pll.vco);  in cm_basic_init()
139 	writel(cfg->peri_vco_base, &clock_manager_base->per_pll.vco);  in cm_basic_init()
165 	writel(cfg->emac0clk, &clock_manager_base->per_pll.emac0clk);  in cm_basic_init()
168 	writel(cfg->emac1clk, &clock_manager_base->per_pll.emac1clk);  in cm_basic_init()
173 	writel(cfg->perqspiclk, &clock_manager_base->per_pll.perqspiclk);  in cm_basic_init()
180 	       &clock_manager_base->per_pll.pernandsdmmcclk);  in cm_basic_init()
183 	writel(cfg->perbaseclk, &clock_manager_base->per_pll.perbaseclk);  in cm_basic_init()
186 	writel(cfg->s2fuser1clk, &clock_manager_base->per_pll.s2fuser1clk);  in cm_basic_init()
199 	       &clock_manager_base->per_pll.vco);  in cm_basic_init()
213 	writel(cfg->perdiv, &clock_manager_base->per_pll.div);  in cm_basic_init()
215 	writel(cfg->gpiodiv, &clock_manager_base->per_pll.gpiodiv);  in cm_basic_init()
242 	u32 periphvco = readl(&clock_manager_base->per_pll.vco);  in cm_basic_init()
246 	       &clock_manager_base->per_pll.vco);  in cm_basic_init()
259 	       &clock_manager_base->per_pll.vco);  in cm_basic_init()
304 	writel(cfg->persrc, &clock_manager_base->per_pll.src);  in cm_basic_init()
309 	writel(~0, &clock_manager_base->per_pll.en);  in cm_basic_init()
340 	reg = readl(&clock_manager_base->per_pll.vco);  in cm_get_per_vco_clk_hz()
351 	reg = readl(&clock_manager_base->per_pll.vco);  in cm_get_per_vco_clk_hz()
426 		reg = readl(&clock_manager_base->per_pll.perbaseclk);  in cm_get_l4_sp_clk_hz()
444 	reg = readl(&clock_manager_base->per_pll.src);  in cm_get_mmc_controller_clk_hz()
460 		reg = readl(&clock_manager_base->per_pll.pernandsdmmcclk);  in cm_get_mmc_controller_clk_hz()
474 	reg = readl(&clock_manager_base->per_pll.src);  in cm_get_qspi_controller_clk_hz()
490 		reg = readl(&clock_manager_base->per_pll.perqspiclk);  in cm_get_qspi_controller_clk_hz()
504 	reg = readl(&clock_manager_base->per_pll.perbaseclk);  in cm_get_spi_controller_clk_hz()