104 			  struct perpll_cfg *per_cfg,  in of_get_clk_cfg()  argument
141 					 sizeof(*per_cfg)/sizeof(u32),  in of_get_clk_cfg()
142 					 per_cfg))  in of_get_clk_cfg()
194 		struct mainpll_cfg *main_cfg, struct perpll_cfg *per_cfg)  in cm_calc_handoff_periph_vco_clk_hz()  argument
199 	switch (per_cfg->vco0_psrc) {  in cm_calc_handoff_periph_vco_clk_hz()
218 	clk_hz /= 1 + per_cfg->vco1_denom;  in cm_calc_handoff_periph_vco_clk_hz()
219 	clk_hz *= 1 + per_cfg->vco1_numer;  in cm_calc_handoff_periph_vco_clk_hz()
226 					       struct perpll_cfg *per_cfg)  in cm_calc_handoff_mpu_clk_hz()  argument
238 		clk_hz = cm_calc_handoff_periph_vco_clk_hz(main_cfg, per_cfg);  in cm_calc_handoff_mpu_clk_hz()
262 					       struct perpll_cfg *per_cfg)  in cm_calc_handoff_noc_clk_hz()  argument
274 		clk_hz = cm_calc_handoff_periph_vco_clk_hz(main_cfg, per_cfg);  in cm_calc_handoff_noc_clk_hz()
299 				   struct perpll_cfg *per_cfg)  in cm_is_pll_ramp_required()  argument
316 		    (cm_calc_handoff_mpu_clk_hz(main_cfg, per_cfg) >  in cm_is_pll_ramp_required()
325 		    (cm_calc_handoff_noc_clk_hz(main_cfg, per_cfg) >  in cm_is_pll_ramp_required()
343 		    (cm_calc_handoff_mpu_clk_hz(main_cfg, per_cfg) >  in cm_is_pll_ramp_required()
352 		    (cm_calc_handoff_noc_clk_hz(main_cfg, per_cfg) >  in cm_is_pll_ramp_required()
361 			      struct perpll_cfg *per_cfg,  in cm_calculate_numer()  argument
387 		denom = per_cfg->vco1_denom;  in cm_calculate_numer()
393 		denom = per_cfg->vco1_denom;  in cm_calculate_numer()
412 					   struct perpll_cfg *per_cfg,  in cm_calc_safe_pll_numer()  argument
435 		switch (per_cfg->vco0_psrc) {  in cm_calc_safe_pll_numer()
456 	return cm_calculate_numer(main_cfg, per_cfg, safe_hz, clk_hz);  in cm_calc_safe_pll_numer()
461 			     struct perpll_cfg *per_cfg,  in cm_pll_ramp_main()  argument
469 		clk_final_hz = cm_calc_handoff_mpu_clk_hz(main_cfg, per_cfg);  in cm_pll_ramp_main()
472 		clk_final_hz = cm_calc_handoff_noc_clk_hz(main_cfg, per_cfg);  in cm_pll_ramp_main()
480 			cm_calc_safe_pll_numer(0, main_cfg, per_cfg, clk_hz),  in cm_pll_ramp_main()
493 			       struct perpll_cfg *per_cfg,  in cm_pll_ramp_periph()  argument
501 		clk_final_hz = cm_calc_handoff_mpu_clk_hz(main_cfg, per_cfg);  in cm_pll_ramp_periph()
504 		clk_final_hz = cm_calc_handoff_noc_clk_hz(main_cfg, per_cfg);  in cm_pll_ramp_periph()
509 		writel((per_cfg->vco1_denom << CLKMGR_PERPLL_VCO1_DENOM_LSB) |  in cm_pll_ramp_periph()
510 			cm_calc_safe_pll_numer(1, main_cfg, per_cfg, clk_hz),  in cm_pll_ramp_periph()
515 	writel((per_cfg->vco1_denom << CLKMGR_PERPLL_VCO1_DENOM_LSB) |  in cm_pll_ramp_periph()
516 		per_cfg->vco1_numer, &clock_manager_base->per_pll.vco1);  in cm_pll_ramp_periph()
560 static int cm_full_cfg(struct mainpll_cfg *main_cfg, struct perpll_cfg *per_cfg)  in cm_full_cfg()  argument
591 	       (per_cfg->vco0_psrc << CLKMGR_PERPLL_VCO0_PSRC_LSB),  in cm_full_cfg()
609 	ramp_required = cm_is_pll_ramp_required(0, main_cfg, per_cfg);  in cm_full_cfg()
618 			cm_calc_safe_pll_numer(0, main_cfg, per_cfg,  in cm_full_cfg()
627 	ramp_required = cm_is_pll_ramp_required(1, main_cfg, per_cfg);  in cm_full_cfg()
637 		writel((per_cfg->vco1_denom << CLKMGR_PERPLL_VCO1_DENOM_LSB) |  in cm_full_cfg()
638 			cm_calc_safe_pll_numer(1, main_cfg, per_cfg,  in cm_full_cfg()
642 		writel((per_cfg->vco1_denom << CLKMGR_PERPLL_VCO1_DENOM_LSB) |  in cm_full_cfg()
643 			per_cfg->vco1_numer,  in cm_full_cfg()
702 	writel(per_cfg->cntr2clk_cnt |  in cm_full_cfg()
703 	       (per_cfg->cntr2clk_src << CLKMGR_PERPLL_CNTR2CLK_SRC_LSB),  in cm_full_cfg()
706 	writel(per_cfg->cntr3clk_cnt |  in cm_full_cfg()
707 	       (per_cfg->cntr3clk_src << CLKMGR_PERPLL_CNTR3CLK_SRC_LSB),  in cm_full_cfg()
710 	writel(per_cfg->cntr4clk_cnt |  in cm_full_cfg()
711 	       (per_cfg->cntr4clk_src << CLKMGR_PERPLL_CNTR4CLK_SRC_LSB),  in cm_full_cfg()
714 	writel(per_cfg->cntr5clk_cnt |  in cm_full_cfg()
715 	       (per_cfg->cntr5clk_src << CLKMGR_PERPLL_CNTR5CLK_SRC_LSB),  in cm_full_cfg()
718 	writel(per_cfg->cntr6clk_cnt |  in cm_full_cfg()
719 	       (per_cfg->cntr6clk_src << CLKMGR_PERPLL_CNTR6CLK_SRC_LSB),  in cm_full_cfg()
722 	writel(per_cfg->cntr7clk_cnt, &clock_manager_base->per_pll.cntr7clk);  in cm_full_cfg()
724 	writel(per_cfg->cntr8clk_cnt |  in cm_full_cfg()
725 	       (per_cfg->cntr8clk_src << CLKMGR_PERPLL_CNTR8CLK_SRC_LSB),  in cm_full_cfg()
728 	writel(per_cfg->cntr9clk_cnt, &clock_manager_base->per_pll.cntr9clk);  in cm_full_cfg()
753 	writel(per_cfg->gpiodiv_gpiodbclk,  in cm_full_cfg()
757 	writel((per_cfg->emacctl_emac0sel <<  in cm_full_cfg()
759 	       (per_cfg->emacctl_emac1sel <<  in cm_full_cfg()
761 	       (per_cfg->emacctl_emac2sel <<  in cm_full_cfg()
806 		cm_pll_ramp_main(main_cfg, per_cfg, pll_ramp_main_hz);  in cm_full_cfg()
808 		cm_pll_ramp_periph(main_cfg, per_cfg, pll_ramp_periph_hz);  in cm_full_cfg()
882 	struct perpll_cfg per_cfg;  in cm_basic_init()  local
888 	memset(&per_cfg, 0, sizeof(per_cfg));  in cm_basic_init()
891 	rval = of_get_clk_cfg(blob, &main_cfg, &per_cfg, &altrgrp_cfg);  in cm_basic_init()
895 	rval =  cm_full_cfg(&main_cfg, &per_cfg);  in cm_basic_init()