Lines Matching refs:PINMUX_CFG_REG_VAR
3812 { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060200, 32,
3858 { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060204, 32,
3902 { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060208, 32,
3946 { PINMUX_CFG_REG_VAR("IPSR3", 0xE606020C, 32,
3990 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060210, 32,
4034 { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060214, 32,
4078 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060218, 32,
4122 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606021C, 32,
4166 { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060220, 32,
4215 { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060224, 32,
4259 { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060228, 32,
4303 { PINMUX_CFG_REG_VAR("IPSR11", 0xE606022C, 32,
4348 { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060230, 32,
4391 { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060234, 32,
4436 { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060238, 32,
4479 { PINMUX_CFG_REG_VAR("IPSR15", 0xE606023C, 32,
4523 { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060240, 32,
4566 { PINMUX_CFG_REG_VAR("IPSR17", 0xE6060244, 32,
4611 { PINMUX_CFG_REG_VAR("IPSR18", 0xE6060248, 32,
4655 { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xE6060500, 32,
4719 { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xE6060504, 32,
4818 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060508, 32,