Lines Matching refs:ctrl
62 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); in io_settings_lpddr2()
63 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1); in io_settings_lpddr2()
64 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0); in io_settings_lpddr2()
65 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1); in io_settings_lpddr2()
66 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); in io_settings_lpddr2()
67 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); in io_settings_lpddr2()
68 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_lpddr2()
69 writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1); in io_settings_lpddr2()
70 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); in io_settings_lpddr2()
80 writel(ioregs->ctrl_ddr3ch, (*ctrl)->control_ddr3ch1_0); in io_settings_ddr3()
81 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); in io_settings_ddr3()
82 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1); in io_settings_ddr3()
84 writel(ioregs->ctrl_ddr3ch, (*ctrl)->control_ddr3ch2_0); in io_settings_ddr3()
85 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0); in io_settings_ddr3()
86 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1); in io_settings_ddr3()
88 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_ddr3()
89 writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1); in io_settings_ddr3()
92 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); in io_settings_ddr3()
93 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); in io_settings_ddr3()
97 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); in io_settings_ddr3()
100 (*ctrl)->control_emif1_sdram_config_ext); in io_settings_ddr3()
103 (*ctrl)->control_emif2_sdram_config_ext); in io_settings_ddr3()
107 io_settings = (readl((*ctrl)->control_port_emif1_sdram_config) in io_settings_ddr3()
110 (*ctrl)->control_port_emif1_sdram_config); in io_settings_ddr3()
112 io_settings = (readl((*ctrl)->control_port_emif2_sdram_config) in io_settings_ddr3()
115 (*ctrl)->control_port_emif2_sdram_config); in io_settings_ddr3()
118 (*ctrl)->control_ddr_control_ext_0); in io_settings_ddr3()
133 io_settings = readl((*ctrl)->control_smart1io_padconf_0) & in do_io_settings()
137 writel(io_settings, (*ctrl)->control_smart1io_padconf_0); in do_io_settings()
141 io_settings = readl((*ctrl)->control_smart1io_padconf_1) & in do_io_settings()
144 writel(io_settings, (*ctrl)->control_smart1io_padconf_1); in do_io_settings()
148 io_settings = readl((*ctrl)->control_smart1io_padconf_2) & in do_io_settings()
151 writel(io_settings, (*ctrl)->control_smart1io_padconf_2); in do_io_settings()
155 io_settings = readl((*ctrl)->control_smart2io_padconf_0) & in do_io_settings()
158 writel(io_settings, (*ctrl)->control_smart2io_padconf_0); in do_io_settings()
162 io_settings = readl((*ctrl)->control_smart2io_padconf_1) & in do_io_settings()
165 writel(io_settings, (*ctrl)->control_smart2io_padconf_1); in do_io_settings()
169 io_settings = readl((*ctrl)->control_smart2io_padconf_2) & in do_io_settings()
172 writel(io_settings, (*ctrl)->control_smart2io_padconf_2); in do_io_settings()
177 io_settings = readl((*ctrl)->control_smart3io_padconf_1) & in do_io_settings()
182 writel(io_settings, (*ctrl)->control_smart3io_padconf_1); in do_io_settings()
213 srcomp_value = readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
218 writel(srcomp_value, (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
228 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
231 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
233 while (((readl((*ctrl)->control_srcomp_north_side + i*4) in srcomp_enable()
239 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
242 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
245 srcomp_value = readl((*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
250 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
254 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
257 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
260 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
263 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
267 readl((*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
269 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
272 readl((*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
274 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
285 while (((readl((*ctrl)->control_srcomp_north_side + i*4) in srcomp_enable()
291 readl((*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
294 (*ctrl)->control_srcomp_north_side + i*4); in srcomp_enable()
297 while (((readl((*ctrl)->control_srcomp_east_side_wkup) & in srcomp_enable()
302 readl((*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
304 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); in srcomp_enable()
318 (*ctrl)->control_emif1_sdram_config_ext); in config_data_eye_leveling_samples()
321 (*ctrl)->control_emif2_sdram_config_ext); in config_data_eye_leveling_samples()
388 die_id[0] = readl((*ctrl)->control_std_fuse_die_id_0); in omap_die_id()
389 die_id[1] = readl((*ctrl)->control_std_fuse_die_id_1); in omap_die_id()
390 die_id[2] = readl((*ctrl)->control_std_fuse_die_id_2); in omap_die_id()
391 die_id[3] = readl((*ctrl)->control_std_fuse_die_id_3); in omap_die_id()
463 value = readl((*ctrl)->control_pbias); in vmmc_pbias_config()
465 writel(value, (*ctrl)->control_pbias); in vmmc_pbias_config()
468 writel(value, (*ctrl)->control_pbias); in vmmc_pbias_config()
480 value = readl((*ctrl)->control_pbias); in vmmc_pbias_config()
482 writel(value, (*ctrl)->control_pbias); in vmmc_pbias_config()
485 writel(value, (*ctrl)->control_pbias); in vmmc_pbias_config()