include/mach/soc.h

51 #define MVEBU_REGISTER(x)	(SOC_REGS_PHY_BASE + x)  macro
53 #define MVEBU_SDRAM_SCRATCH	(MVEBU_REGISTER(0x01504))
54 #define MVEBU_L2_CACHE_BASE	(MVEBU_REGISTER(0x08000))
56 #define MVEBU_TWSI_BASE		(MVEBU_REGISTER(0x11000))
57 #define MVEBU_TWSI1_BASE	(MVEBU_REGISTER(0x11100))
58 #define MVEBU_MPP_BASE		(MVEBU_REGISTER(0x18000))
59 #define MVEBU_GPIO0_BASE	(MVEBU_REGISTER(0x18100))
60 #define MVEBU_GPIO1_BASE	(MVEBU_REGISTER(0x18140))
61 #define MVEBU_GPIO2_BASE	(MVEBU_REGISTER(0x18180))
62 #define MVEBU_SYSTEM_REG_BASE	(MVEBU_REGISTER(0x18200))
63 #define MVEBU_CLOCK_BASE	(MVEBU_REGISTER(0x18700))
64 #define MVEBU_CPU_WIN_BASE	(MVEBU_REGISTER(0x20000))
65 #define MVEBU_SDRAM_BASE	(MVEBU_REGISTER(0x20180))
66 #define MVEBU_TIMER_BASE	(MVEBU_REGISTER(0x20300))
67 #define MVEBU_REG_PCIE_BASE	(MVEBU_REGISTER(0x40000))
68 #define MVEBU_AXP_USB_BASE      (MVEBU_REGISTER(0x50000))
69 #define MVEBU_USB20_BASE	(MVEBU_REGISTER(0x58000))
70 #define MVEBU_REG_PCIE0_BASE	(MVEBU_REGISTER(0x80000))
71 #define MVEBU_AXP_SATA_BASE	(MVEBU_REGISTER(0xa0000))
72 #define MVEBU_SATA0_BASE	(MVEBU_REGISTER(0xa8000))
73 #define MVEBU_NAND_BASE		(MVEBU_REGISTER(0xd0000))
74 #define MVEBU_SDIO_BASE		(MVEBU_REGISTER(0xd8000))
75 #define MVEBU_LCD_BASE		(MVEBU_REGISTER(0xe0000))
76 #define MVEBU_DFX_BASE		(MVEBU_REGISTER(0xe4000))
78 #define SOC_COHERENCY_FABRIC_CTRL_REG	(MVEBU_REGISTER(0x20200))
81 #define MBUS_BRIDGE_WIN_CTRL_REG (MVEBU_REGISTER(0x20250))
82 #define MBUS_BRIDGE_WIN_BASE_REG (MVEBU_REGISTER(0x20254))
108 #define COMPHY_REFCLK_ALIGNMENT	(MVEBU_REGISTER(0x182f8))
111 #define CONFIG_BOOTROM_ERR_REG	(MVEBU_REGISTER(0x182d0))
118 #define CONFIG_SAR_REG		(MVEBU_REGISTER(0xe8200))
119 #define CONFIG_SAR2_REG		(MVEBU_REGISTER(0xe8204))
131 #define CONFIG_SAR_REG		(MVEBU_REGISTER(0x18600))
147 #define CONFIG_SAR_REG		(MVEBU_REGISTER(0x18230))
148 #define CONFIG_SAR2_REG		(MVEBU_REGISTER(0x18234))