Lines Matching refs:pll
47 if (!(pllctl_reg_read(data->pll, stat) & PLLSTAT_GOSTAT_MASK)) in wait_for_completion()
54 pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLENSRC_MASK | in bypass_main_pll()
69 if (data->pll == MAIN_PLL) in configure_mult_div()
70 pllctl_reg_write(data->pll, mult, pllm & PLLM_MULT_LO_MASK); in configure_mult_div()
72 clrsetbits_le32(keystone_pll_regs[data->pll].reg0, in configure_mult_div()
78 clrsetbits_le32(keystone_pll_regs[data->pll].reg0, in configure_mult_div()
83 clrsetbits_le32(keystone_pll_regs[data->pll].reg1, in configure_mult_div()
87 clrsetbits_le32(keystone_pll_regs[data->pll].reg0, in configure_mult_div()
101 tmp = pllctl_reg_read(data->pll, secctl); in configure_main_pll()
105 setbits_le32(keystone_pll_regs[data->pll].reg1, in configure_main_pll()
111 pllctl_reg_setbits(data->pll, secctl, SECCTL_BYPASS_MASK); in configure_main_pll()
112 pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLPWRDN_MASK); in configure_main_pll()
116 pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLPWRDN_MASK); in configure_main_pll()
124 pllctl_reg_rmw(data->pll, secctl, SECCTL_OP_DIV_MASK, in configure_main_pll()
131 offset = pllctl_reg(data->pll, div1) + i; in configure_main_pll()
133 offset = pllctl_reg(data->pll, div4) + (i - 3); in configure_main_pll()
142 pllctl_reg_setbits(data->pll, alnctl, alnctl_val); in configure_main_pll()
147 pllctl_reg_setbits(data->pll, cmd, PLLSTAT_GOSTAT_MASK); in configure_main_pll()
152 pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLRST_MASK); in configure_main_pll()
154 pllctl_reg_clrbits(data->pll, ctl, PLLCTL_PLLRST_MASK); in configure_main_pll()
158 pllctl_reg_clrbits(data->pll, secctl, SECCTL_BYPASS_MASK); in configure_main_pll()
159 pllctl_reg_setbits(data->pll, ctl, PLLCTL_PLLEN_MASK); in configure_main_pll()
167 if (cpu_is_k2hk() && data->pll == TETRIS_PLL) in configure_secondary_pll()
171 setbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_ENSAT_MASK); in configure_secondary_pll()
172 setbits_le32(keystone_pll_regs[data->pll].reg0, in configure_secondary_pll()
178 clrsetbits_le32(keystone_pll_regs[data->pll].reg0, in configure_secondary_pll()
184 setbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_RST_MASK); in configure_secondary_pll()
189 if (data->pll == PASS_PLL && cpu_is_k2hk()) in configure_secondary_pll()
192 clrbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_RST_MASK); in configure_secondary_pll()
197 clrbits_le32(keystone_pll_regs[data->pll].reg0, in configure_secondary_pll()
201 if (cpu_is_k2hk() && data->pll == TETRIS_PLL) in configure_secondary_pll()
207 if (data->pll == MAIN_PLL) in init_pll()
222 int pll; in init_plls() local
224 for (pll = MAIN_PLL; pll < MAX_PLL_COUNT; pll++) { in init_plls()
225 data = get_pll_init_data(pll); in init_plls()
280 static unsigned long pll_freq_get(int pll) in pll_freq_get() argument
286 if (pll == MAIN_PLL) { in pll_freq_get()
288 if (pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN_MASK) { in pll_freq_get()
294 (pllctl_reg_read(pll, mult) & in pll_freq_get()
296 output_div = ((pllctl_reg_read(pll, secctl) & in pll_freq_get()
303 switch (pll) { in pll_freq_get()