Lines Matching refs:val
86 u32 reg, val; in pcc_clock_enable() local
93 val = readl(reg); in pcc_clock_enable()
96 clk, reg, val, enable); in pcc_clock_enable()
98 if (!(val & PCC_PR_MASK) || (val & PCC_INUSE_MASK)) in pcc_clock_enable()
102 val |= PCC_CGC_MASK; in pcc_clock_enable()
104 val &= ~PCC_CGC_MASK; in pcc_clock_enable()
106 writel(val, reg); in pcc_clock_enable()
108 clk_debug("pcc_clock_enable: val 0x%x\n", val); in pcc_clock_enable()
116 u32 reg, val, i, clksrc_type; in pcc_clock_sel() local
142 val = readl(reg); in pcc_clock_sel()
145 clk, reg, val, clksrc_type); in pcc_clock_sel()
147 if (!(val & PCC_PR_MASK) || (val & PCC_INUSE_MASK) || in pcc_clock_sel()
148 (val & PCC_CGC_MASK)) { in pcc_clock_sel()
149 printf("Not permit to select clock source val = 0x%x\n", val); in pcc_clock_sel()
153 val &= ~PCC_PCS_MASK; in pcc_clock_sel()
154 val |= ((i + 1) << PCC_PCS_OFFSET); in pcc_clock_sel()
156 writel(val, reg); in pcc_clock_sel()
158 clk_debug("pcc_clock_sel: val 0x%x\n", val); in pcc_clock_sel()
165 u32 reg, val; in pcc_clock_div_config() local
178 val = readl(reg); in pcc_clock_div_config()
180 if (!(val & PCC_PR_MASK) || (val & PCC_INUSE_MASK) || in pcc_clock_div_config()
181 (val & PCC_CGC_MASK)) { in pcc_clock_div_config()
182 printf("Not permit to set div/frac val = 0x%x\n", val); in pcc_clock_div_config()
187 val |= PCC_FRAC_MASK; in pcc_clock_div_config()
189 val &= ~PCC_FRAC_MASK; in pcc_clock_div_config()
191 val &= ~PCC_PCD_MASK; in pcc_clock_div_config()
192 val |= (div - 1) & PCC_PCD_MASK; in pcc_clock_div_config()
194 writel(val, reg); in pcc_clock_div_config()
201 u32 reg, val; in pcc_clock_is_enable() local
207 val = readl(reg); in pcc_clock_is_enable()
209 if ((val & PCC_INUSE_MASK) || (val & PCC_CGC_MASK)) in pcc_clock_is_enable()
217 u32 reg, val, clksrc_type; in pcc_clock_get_clksrc() local
231 val = readl(reg); in pcc_clock_get_clksrc()
234 clk, reg, val, clksrc_type); in pcc_clock_get_clksrc()
236 if (!(val & PCC_PR_MASK)) { in pcc_clock_get_clksrc()
237 printf("This pcc slot is not present = 0x%x\n", val); in pcc_clock_get_clksrc()
241 val &= PCC_PCS_MASK; in pcc_clock_get_clksrc()
242 val = (val >> PCC_PCS_OFFSET); in pcc_clock_get_clksrc()
244 if (!val) { in pcc_clock_get_clksrc()
249 *src = pcc_clksrc[clksrc_type][val - 1]; in pcc_clock_get_clksrc()
258 u32 reg, val, rate, frac, div; in pcc_clock_get_rate() local
272 val = readl(reg); in pcc_clock_get_rate()
274 frac = (val & PCC_FRAC_MASK) >> PCC_FRAC_OFFSET; in pcc_clock_get_rate()
275 div = (val & PCC_PCD_MASK) >> PCC_PCD_OFFSET; in pcc_clock_get_rate()