376 static int select(enum clk_root_index clock_id)  in select()  argument
384 		if (clock_id == p->entry)  in select()
410 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src)  in clock_set_src()  argument
415 	if (clock_id >= CLK_ROOT_MAX)  in clock_set_src()
418 	root_entry = select(clock_id);  in clock_set_src()
426 	reg = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_set_src()
429 	__raw_writel(reg, &imx_ccm->root[clock_id].target_root);  in clock_set_src()
435 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src)  in clock_get_src()  argument
441 	if (clock_id >= CLK_ROOT_MAX)  in clock_get_src()
444 	val = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_get_src()
448 	root_entry = select(clock_id);  in clock_get_src()
458 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div)  in clock_set_prediv()  argument
464 	if (clock_id >= CLK_ROOT_MAX)  in clock_set_prediv()
467 	root_entry = select(clock_id);  in clock_set_prediv()
482 	reg = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_set_prediv()
485 	__raw_writel(reg, &imx_ccm->root[clock_id].target_root);  in clock_set_prediv()
490 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div)  in clock_get_prediv()  argument
496 	if (clock_id >= CLK_ROOT_MAX)  in clock_get_prediv()
499 	root_entry = select(clock_id);  in clock_get_prediv()
512 	val = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_get_prediv()
521 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div)  in clock_set_postdiv()  argument
525 	if (clock_id >= CLK_ROOT_MAX)  in clock_set_postdiv()
528 	if (clock_id == DRAM_PHYM_CLK_ROOT) {  in clock_set_postdiv()
536 	if ((clock_id == DRAM_CLK_ROOT) && (div > CLK_ROOT_POST_DIV7)) {  in clock_set_postdiv()
541 	reg = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_set_postdiv()
544 	__raw_writel(reg, &imx_ccm->root[clock_id].target_root);  in clock_set_postdiv()
549 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div)  in clock_get_postdiv()  argument
553 	if (clock_id >= CLK_ROOT_MAX)  in clock_get_postdiv()
556 	if (clock_id == DRAM_PHYM_CLK_ROOT) {  in clock_get_postdiv()
561 	val = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_get_postdiv()
562 	if (clock_id == DRAM_CLK_ROOT)  in clock_get_postdiv()
573 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,  in clock_set_autopostdiv()  argument
580 	if (clock_id >= CLK_ROOT_MAX)  in clock_set_autopostdiv()
583 	root_entry = select(clock_id);  in clock_set_autopostdiv()
597 	val = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_set_autopostdiv()
606 	__raw_writel(val, &imx_ccm->root[clock_id].target_root);  in clock_set_autopostdiv()
611 int clock_get_autopostdiv(enum clk_root_index clock_id, enum root_auto_div *div,  in clock_get_autopostdiv()  argument
618 	if (clock_id >= CLK_ROOT_MAX)  in clock_get_autopostdiv()
621 	root_entry = select(clock_id);  in clock_get_autopostdiv()
637 	val = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_get_autopostdiv()
651 int clock_get_target_val(enum clk_root_index clock_id, u32 *val)  in clock_get_target_val()  argument
653 	if (clock_id >= CLK_ROOT_MAX)  in clock_get_target_val()
656 	*val = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_get_target_val()
661 int clock_set_target_val(enum clk_root_index clock_id, u32 val)  in clock_set_target_val()  argument
663 	if (clock_id >= CLK_ROOT_MAX)  in clock_set_target_val()
666 	__raw_writel(val, &imx_ccm->root[clock_id].target_root);  in clock_set_target_val()
672 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,  in clock_root_cfg()  argument
679 	if (clock_id >= CLK_ROOT_MAX)  in clock_root_cfg()
682 	root_entry = select(clock_id);  in clock_root_cfg()
720 	__raw_writel(val, &imx_ccm->root[clock_id].target_root);  in clock_root_cfg()
725 int clock_root_enabled(enum clk_root_index clock_id)  in clock_root_enabled()  argument
729 	if (clock_id >= CLK_ROOT_MAX)  in clock_root_enabled()
735 	if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT))  in clock_root_enabled()
738 	val = __raw_readl(&imx_ccm->root[clock_id].target_root);  in clock_root_enabled()