Lines Matching refs:EXT_CLK_2

90 	  EXT_CLK_1, EXT_CLK_2, EXT_CLK_3,
115 	  PLL_SYS_PFD5_CLK, REF_1M_CLK, EXT_CLK_2,
121 	  PLL_ENET_MAIN_125M_CLK, EXT_CLK_2}
126 	  PLL_ENET_MAIN_125M_CLK, EXT_CLK_2}
145 	  EXT_CLK_1, EXT_CLK_2, EXT_CLK_3,
155 	  EXT_CLK_1, EXT_CLK_2, EXT_CLK_3,
225 	  PLL_ENET_MAIN_100M_CLK, PLL_SYS_MAIN_480M_CLK, EXT_CLK_2,
230 	  PLL_ENET_MAIN_100M_CLK, PLL_SYS_MAIN_480M_CLK, EXT_CLK_2,
235 	  PLL_ENET_MAIN_100M_CLK, PLL_SYS_MAIN_480M_CLK, EXT_CLK_2,
240 	  PLL_ENET_MAIN_100M_CLK, PLL_SYS_MAIN_480M_CLK, EXT_CLK_2,
245 	  PLL_ENET_MAIN_100M_CLK, PLL_SYS_MAIN_480M_CLK, EXT_CLK_2,
250 	  PLL_ENET_MAIN_100M_CLK, PLL_SYS_MAIN_480M_CLK, EXT_CLK_2,
255 	  PLL_ENET_MAIN_100M_CLK, PLL_SYS_MAIN_480M_CLK, EXT_CLK_2,
290 	  PLL_ENET_MAIN_40M_CLK, PLL_AUDIO_MAIN_CLK, EXT_CLK_2,
295 	  PLL_ENET_MAIN_40M_CLK, PLL_AUDIO_MAIN_CLK, EXT_CLK_2,
326 	  PLL_AUDIO_MAIN_CLK, EXT_CLK_2}