include/mach/dmc.h

208 struct exynos5420_dmc {  struct
209 	unsigned int concontrol;
210 	unsigned int memcontrol;
211 	unsigned int cgcontrol;
212 	unsigned char res500[0x4];
213 	unsigned int directcmd;
214 	unsigned int prechconfig0;
215 	unsigned int phycontrol0;
216 	unsigned int prechconfig1;
217 	unsigned char res1[0x8];
218 	unsigned int pwrdnconfig;
219 	unsigned int timingpzq;
220 	unsigned int timingref;
221 	unsigned int timingrow0;
222 	unsigned int timingdata0;
223 	unsigned int timingpower0;
224 	unsigned int phystatus;
225 	unsigned int etctiming;
226 	unsigned int chipstatus;
227 	unsigned char res3[0x8];
228 	unsigned int mrstatus;
229 	unsigned char res4[0x8];
230 	unsigned int qoscontrol0;
231 	unsigned char resr5[0x4];
232 	unsigned int qoscontrol1;
233 	unsigned char res6[0x4];
234 	unsigned int qoscontrol2;
235 	unsigned char res7[0x4];
236 	unsigned int qoscontrol3;
237 	unsigned char res8[0x4];
238 	unsigned int qoscontrol4;
239 	unsigned char res9[0x4];
240 	unsigned int qoscontrol5;
241 	unsigned char res10[0x4];
242 	unsigned int qoscontrol6;
243 	unsigned char res11[0x4];
244 	unsigned int qoscontrol7;
245 	unsigned char res12[0x4];
246 	unsigned int qoscontrol8;
247 	unsigned char res13[0x4];
248 	unsigned int qoscontrol9;
249 	unsigned char res14[0x4];
250 	unsigned int qoscontrol10;
251 	unsigned char res15[0x4];
252 	unsigned int qoscontrol11;
253 	unsigned char res16[0x4];
254 	unsigned int qoscontrol12;
255 	unsigned char res17[0x4];
256 	unsigned int qoscontrol13;
257 	unsigned char res18[0x4];
258 	unsigned int qoscontrol14;
259 	unsigned char res19[0x4];
260 	unsigned int qoscontrol15;
261 	unsigned char res20[0x4];
262 	unsigned int timing_set_sw;
263 	unsigned int timingrow1;
264 	unsigned int timingdata1;
265 	unsigned int timingpower1;
266 	unsigned char res300[0x4];
267 	unsigned int wrtra_config;
268 	unsigned int rdlvl_config;
269 	unsigned char res21[0x4];
270 	unsigned int brbrsvcontrol;
271 	unsigned int brbrsvconfig;
272 	unsigned int brbqosconfig;
273 	unsigned char res301[0x14];
274 	unsigned int wrlvl_config0;
275 	unsigned int wrlvl_config1;
276 	unsigned int wrlvl_status;
277 	unsigned char res23[0x4];
278 	unsigned int ppcclockon;
279 	unsigned int perevconfig0;
280 	unsigned int perevconfig1;
281 	unsigned int perevconfig2;
282 	unsigned int perevconfig3;
283 	unsigned char res24[0xc];
284 	unsigned int control_io_rdata;
285 	unsigned char res240[0xc];
286 	unsigned int cacal_config0;
287 	unsigned int cacal_config1;
288 	unsigned int cacal_status;
289 	unsigned char res302[0xa4];
290 	unsigned int bp_control0;
291 	unsigned int bp_config0_r;
292 	unsigned int bp_config0_w;
293 	unsigned char res303[0x4];
294 	unsigned int bp_control1;
295 	unsigned int bp_config1_r;
296 	unsigned int bp_config1_w;
297 	unsigned char res304[0x4];
298 	unsigned int bp_control2;
299 	unsigned int bp_config2_r;
300 	unsigned int bp_config2_w;
301 	unsigned char res305[0x4];
302 	unsigned int bp_control3;
303 	unsigned int bp_config3_r;
304 	unsigned int bp_config3_w;
305 	unsigned char res306[0xddb4];
306 	unsigned int pmnc_ppc;
307 	unsigned char res25[0xc];
308 	unsigned int cntens_ppc;
309 	unsigned char res26[0xc];
310 	unsigned int cntenc_ppc;
311 	unsigned char res27[0xc];
312 	unsigned int intens_ppc;
313 	unsigned char res28[0xc];
314 	unsigned int intenc_ppc;
315 	unsigned char res29[0xc];
316 	unsigned int flag_ppc;
317 	unsigned char res30[0xac];
318 	unsigned int ccnt_ppc;
319 	unsigned char res31[0xc];
320 	unsigned int pmcnt0_ppc;
321 	unsigned char res32[0xc];
322 	unsigned int pmcnt1_ppc;
323 	unsigned char res33[0xc];
324 	unsigned int pmcnt2_ppc;
325 	unsigned char res34[0xc];
326 	unsigned int pmcnt3_ppc;