Lines Matching refs:val
22 unsigned long val = 0; in dmc_config_zq() local
30 val = PHY_CON16_RESET_VAL; in dmc_config_zq()
31 val |= mem->zq_mode_dds << PHY_CON16_ZQ_MODE_DDS_SHIFT; in dmc_config_zq()
32 val |= mem->zq_mode_term << PHY_CON16_ZQ_MODE_TERM_SHIFT; in dmc_config_zq()
33 val |= ZQ_CLK_DIV_EN; in dmc_config_zq()
34 writel(val, phy0_con16); in dmc_config_zq()
35 writel(val, phy1_con16); in dmc_config_zq()
39 val |= PHY_CON16_ZQ_MODE_NOTERM_MASK; in dmc_config_zq()
40 writel(val, phy0_con16); in dmc_config_zq()
41 writel(val, phy1_con16); in dmc_config_zq()
44 val |= ZQ_MANUAL_STR; in dmc_config_zq()
45 writel(val, phy0_con16); in dmc_config_zq()
46 writel(val, phy1_con16); in dmc_config_zq()
49 val &= ~ZQ_MANUAL_STR; in dmc_config_zq()
62 writel(val, phy0_con16); in dmc_config_zq()
71 writel(val, phy1_con16); in dmc_config_zq()
78 unsigned long val; in update_reset_dll() local
81 val = MEM_TERM_EN | PHY_TERM_EN | DMC_CTRL_SHGATE; in update_reset_dll()
82 writel(val, phycontrol0); in update_reset_dll()
86 val = readl(phycontrol0); in update_reset_dll()
87 val |= FP_RSYNC; in update_reset_dll()
88 writel(val, phycontrol0); in update_reset_dll()
91 val = readl(phycontrol0); in update_reset_dll()
92 val &= ~FP_RSYNC; in update_reset_dll()
93 writel(val, phycontrol0); in update_reset_dll()